ST STM32L4+ Series Reference Manual page 214

Power control (PWR)
Refer to
When exiting Standby mode, I/O's that were configured with pull-up or pull-down during
Standby through registers PWR_PUCRx or PWR_PDCRx will keep this configuration upon
exiting Standby mode until the bit APC of PWR_CR3 register has been cleared. Once the bit
APC is cleared, they will be either configured to their reset values or to the pull-up/pull-down
state according the GPIOx_PUPDR registers. The content of the PWR_PUCRx or
PWR_PDCRx registers however is not lost and can be re-used for a sub-sequent entering
into Standby mode.
Some I/Os (listed in
debug and have internal pull-up or pull-down activated after reset so will be configured at
this reset value as well when exiting Standby mode.
For IO's, with a pull-up or pull-down pre-defined after reset (some JTAG/SW IO's) or with
GPIOx_PUPDR programming done after exiting from Standby, in case those programming
is different from the PWR_PUCRx or PWR_PDCRx programmed value during Standby, both
a pull-down and pull-up will be applied until the bit APC is cleared, releasing the
PWR_PUCRx or PWR_PDCRx programmed value.
Standby mode
Mode entry
Mode exit
Wakeup latency
214/2301
Table 34: Standby mode
Section 8.3.1: General-purpose I/O
WFI (Wait for Interrupt) or WFE (Wait for Event) while:
– SLEEPDEEP bit is set in Cortex
– No interrupt (for WFI) or event (for WFE) is pending
– LPMS = "011" in PWR_CR1
– WUFx bits are cleared in power status register 1 (PWR_SR1)
On return from ISR while:
– SLEEPDEEP bit is set in Cortex
– SLEEPONEXIT = 1
– No interrupt is pending
– LPMS = "011" in PWR_CR1 and
– WUFx bits are cleared in power status register 1 (PWR_SR1)
– The RTC flag corresponding to the chosen wakeup source (RTC Alarm
A, RTC Alarm B, RTC wakeup, tamper or timestamp flags) is cleared
WKUPx pin edge, RTC event, external Reset in
BOR reset
Reset phase
for more details on how to exit Standby mode.
Table 34. Standby mode
Description
RM0432 Rev 6
(GPIO)) are used for JTAG/SW
®
-M4 System Control register
®
-M4 System Control register
NRST
pin, IWDG Reset,
RM0432