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RM0432
30.15
DSI Host registers
30.15.1
DSI Host Version Register (DSI_VR)
Address offset: 0x0000
Reset value: 0x3133 302A
31
30
29
15
14
13
Bits 31: 0 VERSION: Version of the DSI Host
30.15.2
DSI Host Control Register (DSI_CR)
Address offset: 0x0004
Reset value: 0x0000 0000
31
30
29
28
Res.
Res.
Res.
Res.
15
14
13
12
Res.
Res.
Res.
Res.
Bits 31: 1 Reserved, must be kept at reset value
Bit 0 EN: Enable
DSI Host (DSIHOST) applied to STM32L4R9xx and STM32L4S9xx only
28
27
26
25
12
11
10
9
This RO register contains the version of the DSI Host
27
26
25
Res.
Res.
Res.
11
10
9
Res.
Res.
Res.
This bit configures the DSI Host in either power-up mode or to reset.
0: DSI Host is disabled (under reset).
1: DSI Host is enabled.
24
23
22
VERSION[31:16]
ro
8
7
6
VERSION[15:0]
ro
24
23
22
21
Res.
Res.
Res.
Res.
8
7
6
5
Res.
Res.
Res.
Res.
RM0432 Rev 6
21
20
19
18
5
4
3
2
20
19
18
Res.
Res.
Res.
4
3
2
Res.
Res.
Res.
17
16
1
0
17
16
Res.
Res.
1
0
Res.
EN
rw
985/2301
1044
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