ST STM32L4+ Series Reference Manual page 1043

RM0432
Table 210. DSIHOST register map and reset values (continued)
Offset Register
0x0104 -
0x0108
DSI_LCVCIDR
0x010C
Reset value
DSI_LCCCR
0x0110
Reset value
0x0114
DSI_LPMCCR
0x0118
Reset value
0x0120-
0x0138
DSI_VMCCR
0x0138
Reset value
DSI_VPCCR
0x013C
Reset value
DSI_VCCCR
0x0140
Reset value
DSI_VNPCCR
0x0144
Reset value
DSI_VHSACCR
0x0148
Reset value
DSI_VHBPCCR
0x014C
Reset value
DSI_VLCCR
0x0150
Reset value
DSI_VVSACCR
0x0154
Reset value
DSI_VVBPCCR
0x0158
Reset value
DSI_VVFPCCR
0x015C
Reset value
DSI_VVACCR
0x0160
Reset value
0x0164-
0x0190
0x0194-
0x03FC
DSI Host (DSIHOST) applied to STM32L4R9xx and STM32L4S9xx only
LPSIZE[7:0]
0 0 0 0 0
RM0432 Rev 6
0 0 0
0 0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0
0 0 0 0
0 0 0 0 0 0
0 0 0
0 0
COLC[3:0]
0 0 0 0 0
VLPSIZE[7:0]
0 0 0 0 0 0 0 0
0 0 0
VPSIZE[13:0]
0 0 0 0 0 0 0 0 0
NUMC[12:0]
0 0 0 0 0 0 0 0 0
NPSIZE[12:0]
0 0 0 0 0 0 0 0 0
HSA[11:0]
0 0 0 0 0 0 0 0 0
HBP[11:0]
0 0 0 0 0 0 0 0 0
HLINE[14:0]
0 0 0 0 0 0 0 0 0
VSA[9:0]
0 0 0 0 0 0 0 0 0 0
VBP[9:0]
0 0 0 0 0 0 0 0 0 0
VFP[9:0]
0 0 0 0 0 0 0 0 0 0
VA[13:0]
0 0 0 0 0 0 0 0 0 0
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