ST STM32L4+ Series Reference Manual page 354

System configuration controller (SYSCFG)
Bit 16 I2C_PB6_FMP: Fast-mode Plus (Fm+) driving capability activation on PB6
Bits 15:10 Reserved, must be kept at reset value.
Bit 9 ANASWVDD: GPIO analog switch control voltage selection
Refer to
Bit 8 BOOSTEN: I/O analog switch voltage booster enable
Bits 7:1 Reserved, must be kept at reset value.
Bit 0 FWDIS: Firewall disable
Table 45
reset depending on the voltage settings.
> 2.4 V
< 2.4 V
9.2.3 SYSCFG external interrupt configuration register 1
(SYSCFG_EXTICR1)
Address offset: 0x08
Reset value: 0x0000 0000
31 30 29
Res. Res. Res. Res.
15 14 13
EXTI3[3:0]
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This bit enables the Fm+ driving mode for PB6.
0: PB6 pin operates in standard mode.
1: Fm+ mode enabled on PB6 pin, and the Speed control is bypassed.
0: I/O analog switches supplied by VDDA or booster when booster is ON
1: I/O analog switches supplied by VDD.
Table 45 for bit 9 setting.
0: I/O analog switches are supplied by V
when using the ADC in high V
1: I/O analog switches are supplied by a dedicated voltage booster (supplied by V
the recommended configuration when using the ADC in low V
This bit is cleared by software to protect the access to the memory segments according to
the Firewall configuration. Once enabled, the firewall cannot be disabled by software. Only a
system reset set the bit.
0: Firewall protection enabled
1: Firewall protection disabled
describes when the bit 9 (ANASWVDD) and the bit 8 (BOOSTEN) should be set or
Table 45. BOOSTEN and ANASWVDD set/reset
VDD
-
28 27 26 25
Res. Res. Res.
12 11 10 9
EXTI2[3:0]
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voltage. This is the recommended configuration
DDA
voltage operation.
DDA
VDDA BOOSTEN
> 2.4 V
< 2.4 V
< 2.4 V
24 23 22
Res. Res. Res.
8 7 6
EXTI1[3:0]
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RM0432 Rev 6
voltage operation.
DDA
ANASWVDD
0
0
1
21 20 19 18
Res. Res. Res. Res.
5 4 3 2
EXTI0[3:0]
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RM0432
). This is
DD
0
1
0
17 16
Res. Res.
1 0
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