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Reset and clock control (RCC)
Bit 6 GPIOGRST: IO port G reset
Bit 5 GPIOFRST: IO port F reset
Bit 4 GPIOERST: IO port E reset
Bit 3 GPIODRST: IO port D reset
Bit 2 GPIOCRST: IO port C reset
Bit 1 GPIOBRST: IO port B reset
Bit 0 GPIOARST: IO port A reset
6.4.12
AHB3 peripheral reset register (RCC_AHB3RSTR)
Address offset: 0x30
Reset value: 0x00000 0000
Access: no wait state, word, half-word and byte access
31
30
29
Res.
Res.
Res.
15
14
13
Res.
Res.
Res.
280/2301
Set and cleared by software.
0: No effect
1: Reset IO port G
Set and cleared by software.
0: No effect
1: Reset IO port F
Set and cleared by software.
0: No effect
1: Reset IO port E
Set and cleared by software.
0: No effect
1: Reset IO port D
Set and cleared by software.
0: No effect
1: Reset IO port C
Set and cleared by software.
0: No effect
1: Reset IO port B
Set and cleared by software.
0: No effect
1: Reset IO port A
28
27
26
25
Res.
Res.
Res.
Res.
12
11
10
9
OSPI2
Res.
Res.
Res.
RST
rw
24
23
22
Res.
Res.
Res.
8
7
6
OSPI1R
Res.
Res.
ST
rw
RM0432 Rev 6
21
20
19
18
Res.
Res.
Res.
Res.
5
4
3
2
Res.
Res.
Res.
Res.
RM0432
17
16
Res.
Res.
1
0
FMCR
Res.
ST
rw
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