ST STM32L4+ Series Reference Manual page 887

RM0432
Table 191. DFSDM register map and reset values (continued)
Register
Offset
name
DFSDM_
FLT2CR1
0x200
reset value
DFSDM_
FLT2CR2
0x204
reset value
DFSDM_
FLT2ISR
0x208
reset value
DFSDM_
FLT2ICR
0x20C
reset value
DFSDM_
FLT2JCHGR
0x210
reset value
DFSDM_
FLT2FCR
0x214
reset value 0
DFSDM_
FLT2JDATAR
0x218
reset value 0
DFSDM_
FLT2RDATAR
0x21C
reset value 0
DFSDM_
FLT2AWHTR
0x220
reset value 0
DFSDM_
FLT2AWLTR
0x224
reset value 0
DFSDM_
FLT2AWSR
0x228
reset value
DFSDM_
FLT2AWCFR
0x22C
reset value
RCH[2:0]
0 0 0 0 0
0 0
0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
Digital filter for sigma delta modulators (DFSDM)
0 0 0 0 0
AWDCH[7:0]
0 0 0 0 0 0 0 0
0
FOSR[9:0]
0 0 0 0 0 0
JDATA[23:0]
0 0 0 0 0 0 0 0
RDATA[23:0]
0 0 0 0 0 0 0 0
AWHT[23:0]
0 0 0 0 0 0 0 0
AWLT[23:0]
0 0 0 0 0 0 0 0
0 0
0 0
RM0432 Rev 6
JEXTSEL[4:0]
0 0 0 0 0 0
EXCH[7:0]
0 0 0 0 0 0
0
0 0
0 0
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
AWHTF[7:0]
0 0 0 0 0 0 0 0
CLRAWHTF[7:0] CLRAWLTF[7:0]
0 0 0 0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0
JCHG[7:0]
0 0 0 0 0 1
IOSR[7:0]
0 0 0 0 0 0
0 0 0
RDATA
CH[2:0]
0 0 0 0
BKAWH[3:0]
0 0 0 0
BKAWL[3:0]
0 0 0 0
AWLTF[7:0]
0 0 0 0 0 0
0 0 0 0 0 0
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