ST STM32L4+ Series Reference Manual page 415

RM0432
Table 62. DMAMUX register map and reset values (continued)
Offset Register
0x088 -
Reserved
0x0FC
DMAMUX_RG0CR
0x100
Reset value
DMAMUX_RG1CR
0x104
Reset value
DMAMUX_RG2CR
0x108
Reset value
DMAMUX_RG3CR
0x10C
Reset value
0x110 -
Reserved
0x13C
DMAMUX_RGSR
0x140
Reset value
DMAMUX_RGCFR
0x144
Reset value
0x148 -
Reserved
0x3FC
Refer to Section 2.2 on page 91
DMA request multiplexer (DMAMUX)
GNBREQ[4:0]
0 0 0 0 0 0 0 0
GNBREQ[4:0]
0 0 0 0 0 0 0 0
GNBREQ[4:0]
0 0 0 0 0 0 0 0
GNBREQ[4:0]
0 0 0 0 0 0 0 0
for the register boundary addresses.
RM0432 Rev 6
SIG_ID[4:0]
0 0 0 0 0 0
SIG_ID[4:0]
0 0 0 0 0 0
SIG_ID[4:0]
0 0 0 0 0 0
SIG_ID[4:0]
0 0 0 0 0 0
0 0 0 0
0 0 0 0
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