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ST STM32L4+ Series Reference Manual page 555

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RM0432
19
Octo-SPI interface (OCTOSPI)
19.1
Introduction
The OCTOSPI supports two frame formats used by most external serial memories such as
serial PSRAMs, serial NAND and serial NOR Flash memories, HyperRAM™ and
HyperFlash™ memories:
Indirect mode: all the operations are performed using the OCTOSPI registers.
Status polling-mode: the external memory status register is periodically read and an
interrupt can be generated in case of flag setting.
Memory-mapped mode: the external memory is memory mapped and it is seen by the
system as if it was an internal memory supporting both read and write operations.
The OCTOSPI supports two frame formats:
the classical frame format with the command, address, alternate byte, dummy cycles
and data phase
the HyperBus™ frame format
19.2
OCTOSPI main features
Three functional modes: Indirect, Status polling, and Memory-mapped
Read and write support in Memory-mapped mode
Supports for single, dual, quad and octal communication
Dual-quad mode, where 8 bits can be sent/received simultaneously by accessing two
quad memories in parallel
SDR (single-data rate) and DTR (double-transfer rate) support
Data strobe support
Fully programmable opcode
Fully programmable frame format
HyperBus support
Integrated FIFO for reception and transmission
8, 16, and 32-bit data accesses allowed
DMA channel for indirect mode operations
Interrupt generation on FIFO threshold, timeout, operation complete, and access error.
RM0432 Rev 6
Octo-SPI interface (OCTOSPI)
555/2301
603

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