ST STM32L4+ Series Reference Manual page 1065

RM0432 True random number generator (RNG) applied to STM32L4Rxxx and STM32L4Sxxx only
32.3 RNG functional description
32.3.1 RNG block diagram
Figure 246
rng_it
rng_clk
32.3.2 RNG internal signals
Table 217
at the STM32 product level (on pads).
Signal name
shows the RNG block diagram.
Figure 246. RNG block diagram
Banked Registers
control
data
AHB
interface
status
AHB clock domain
RNG clock domain
describes a list of useful-to-know internal signals available at the RNG level, not
Table 217. RNG internal input/output signals
Signal type
rng_it Digital output
rng_hclk Digital input
rng_clk Digital input
RNG_CR
RNG_DR
RNG_SR
Fault detection
Clock checker
en_osc
RNG global interrupt request
AHB clock
RNG dedicated clock, asynchronous to rng_hclk
RM0432 Rev 6
True RNG
Conditioning logic
128-bit
Raw data shift reg
2-bit
Sampling &
Normalization (x 2)
Analog Analog
noise noise
source 1 source 2
Analog noise source
Description
MSv42097V2
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