RM0432
ADC and DAC reference voltage
To ensure a better accuracy on low-voltage inputs and outputs, the user can connect to
V
a separate reference voltage lower than V
REF+
represented by the full scale value, for an analog input (ADC) or output (DAC) signal.
V
can be provided either by an external reference of by an internal buffered voltage
REF+
reference (VREFBUF).
The internal voltage reference is enabled by setting the ENVR bit in the
VREFBUF control and status register
2.5 V when the VRS bit is set and to 2.048 V when the VRS bit is cleared. The internal
voltage reference can also provide the voltage to external components through V
Refer to the device datasheet and to
further information.
5.1.2
Independent I/O supply rail
Some I/Os from Port G (PG[15:2]) are supplied from a separate supply rail. The power
supply for this rail can range from 1.08 V to 3.6 V and is provided externally through the
V
pin. The V
DDIO2
V
pin is available only for some packages. Refer to the pinout diagrams or tables in the
DDIO2
related device datasheet(s) for I/O list(s).
After reset, the I/Os supplied by V
are not available. The isolation must be removed before using any I/O from PG[15:2], by
setting the IOSV bit in the PWR_CR2 register, once the V
The V
DDIO2
with the internal reference voltage (3/4 V
Peripheral Voltage Monitoring (PVM)
5.1.3
Independent USB transceivers supply
The USB transceivers are supplied from a separate V
range is from 3.0 V to 3.6 V and is completely independent from V
After reset, the USB features supplied by V
therefore are not available. The isolation must be removed before using the USB OTG
peripheral, by setting the USV bit in the PWR_CR2 register, once the V
present.
The V
DDUSB
compared with the internal reference voltage (V
Peripheral Voltage Monitoring (PVM)
5.1.4
Independent DSI supply
The DSI (Display Serial Interface) sub-system uses several power supply pins which are
independent from the other supply pins:
•
VDDDSI is an independent DSI power supply dedicated for DSI Regulator and MIPI
D-PHY. This supply must be connected to global VDD.
•
VCAPDSI pin is the output of DSI Regulator (1.2V) which must be connected externally
to VDD12DSI.
•
VDD12DSI pin is used to supply the MIPI D-PHY, and to supply clock and data lanes
voltage level is completely independent from V
DDIO2
supply is monitored by the Peripheral Voltage Monitoring (PVM2) and compared
supply is monitored by the Peripheral Voltage Monitoring (PVM1) and
RM0432 Rev 6
. V
DDA
(VREFBUF_CSR). The voltage reference is set to
Section 23: Voltage reference buffer (VREFBUF)
are logically and electrically isolated and therefore
DDIO2
, around 0.9V), refer to
REFINT
for more details.
DDUSB
are logically and electrically isolated and
DDUSB
, around 1.2 V), refer to
REFINT
for more details.
Power control (PWR)
is the highest voltage,
REF+
Section 23.3.1:
or V
DD
supply is present.
DDIO2
Section 5.2.3:
power supply pin. V
or V
DD
DDA
DDUSB
pin.
REF+
for
. The
DDA
DDUSB
.
supply is
Section 5.2.3:
185/2301
237
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