ST STM32L4+ Series Reference Manual page 932

DSI Host (DSIHOST) applied to STM32L4R9xx and STM32L4S9xx only
When the null packets are enabled:
lanebyteclkperiod * NUMC (VPSIZE * bytes_per_pixel + 12 + NPSIZE) / number_of_lanes
= pixels_per_line * LTDC_Clock_period
When the null packets are disabled:
lanebyteclkperiod * NUMC (VPSIZE * bytes_per_pixel + 6) / number_of_lanes
= pixels_per_line * LTDC_Clock_period
30.5.2 Updating the LTDC interface configuration in video mode
It is possible to update the LTDC interface configuration on the fly without impacting the
current frame. It is done with the help of shadow registers. This feature is controlled by the
DSI Host Video Shadow Control Register (DSI_VSCR).
The new configuration is only used when the system requests for it. To update the Video
configuration during the transmission of a video frame, the configuration of that frame needs
to be stored in the auxiliary registers. This way, the new frame configurations can be set
through the APB interface without corrupting the current frame.
By default, this feature is disabled. To enable this feature, set the Enable (EN) bit of the DSI
Host Video Shadow Control Register (DSI_VSCR) to 1.
When this feature is enabled, the system supplies the configuration stored in the auxiliary
registers.
Figure 206
Figure 206. Flow to update the LTDC interface configuration using shadow registers
Immediate update
When the shadow register feature is active, the auxiliary registers requires the LTDC
configuration before the video engine starts. This means that, after a reset, Update Register
(UR) bit is immediately granted.
932/2301
shows the necessary steps to update the LTDC interface configuration.
Configure the LTDC interface
Request update
Read DSI Host LTDC
shadow control register
Active
RM0432 Rev 6
Start video engine
Accepted
UR
New resolution
MSv35855V1
RM0432