STMicroelectronics SPC572L series Reference Manual page 2038

Revision history
Date
03-Apr-2013
2038/2058
Table 1150. Revision history(Continued)
Rev
Section 1.4.7, External channel mapping to internal analog
sentence "After the conversion is performed on a test channel the
converted data is stored at two CDR locations..."
Figure 11 (Main Configuration Register
– Removed EDCSELF (bit 30)
– Removed footnote "Only available with normal trigger feature."
– Removed footnote "Only available with injection trigger feature."
Table 6: MCR field
Chapter 1: Decimation Filter
Relocated (was chapter 40)
Removed all content and references relating to CASCADE mode, EQADC,
PSI mode, and BIQUAD
Table 7: DECFILTER_MCR field
description to "Reserved"
Removed section "Triggered Output"
Chapter 38, Temperature Sensor: unchanged
Chapter 39, System Timer Module (STM): unchanged
Chapter 31: Software Watchdog Timer
Chapter 45: Periodic Interrupt Timer (PIT)
Relocated to Timers section
2
Figure 495 (Block diagram of the
(cont'd)
connectivity
Table 597: PITx memory
reserved rows 0000_0004–0000_00DF and 0000_00E8–0000_00FF
Chapter 42, CAN Subsystem
Section 1.3.3, Dual clock
the device is in STOP mode..."
Section 1.3.5.2.11, Timeout Counter Value Register
register access from "R/W" to "W1C"
Section 1.3.5.2.25, Rx FIFO 0 Configuration Register
the F0S bit field length from 10–15 to 9–15
Section 1.3.5.2.26, Rx FIFO 0 Status Register
F0PI 10–15
Section 1.3.5.2.30, Rx FIFO 1 Status Register
F1PI 10–15
Section 1.3.5.2.32, Rx Buffer / FIFO Element Size Configuration
corrected the register access from "R" to "RP"
Section 1.3.5.2.34, Tx FIFO/Queue Status Register
bits TFGI 19–23
Section 1.3.5.2.44, Tx Event FIFO Status Register
bits EFGI19–23
Updated Section 1.3.13.3, Tx FIFO
Updated Section 1.3.13.5, Mixed dedicated Tx Buffers / Tx FIFO
Updated Section 1.3.5.2.6, CC Control Register (CCCR)
Removed figure "Message RAM Configuration"
Removed table "Standard ID Filter Configuration register field descriptions"
DocID027809 Rev 4
Changes
(MCR)):
descriptions: removed EDCSELF (bit 30)
descriptions: changed FTYPE[11]
(SWT): unchanged
PIT): removed RTI block and associated
map: removed "Reset value" column; added
sources: modified note "Stop this module when
RM0400
channel: added
(TOCV): corrected the
(RXF0C): corrected
(RXF0S): added new bits
(RXF1S): added new bits
(RXESC):
(TXFQS): added new
(TXEFS): added new