STMicroelectronics SPC572L series Reference Manual page 2049

RM0400
Date
27-Feb-2015
Table 1150. Revision history(Continued)
Rev
Added Section 21.6.5, Successive Approximation Register ADC
Table 197: Maximum system level clock
maximum frequency of ADCs from 16 to 14.6 MHz.
Chapter 27: Dual PLL Digital Interface (PLLDIG)
Table 224 (PLLDV field descriptions): updated binary combination
definitions in field description RFDPHI
Section 27.10.2, Clock
– Updated f
– Updated f
– Updated f
denominator
– Removed f
frequency
Chapter 7: Clock Monitor Unit (CMU)
Section 7.6.3, CLKMN1
programmming considerations
Table 231 (CMU_ISR field descriptions): added note to the "OLRI" field
description, "While entering STOP mode, OLRI may be triggered. To
avoid this when the system is..."
24: Clock Generation Module
Chapter 27: Fast OSC Digital Interface (FXOSC)
Rev 3
Table 322: XOSC
(cont'd)
– Removed the row with the first three column elements 'X, 1, X'.
– Added the row with the first three column elements '1, 1, X'.
– Added the row with the first three column elements '0, 1, X'.
– Changed "No crystal, high-impedance" to "Crystal, or left opened" in
XTAL column
– Removed row with last four column elements "ground, external clock,
XTALOUT, and Normal OSC Enabled"
Section 27.3.1, Register
transfer (ips_xfr_err) only..."
Section 27.2.2, Oscillator startup
Chapter 26, IRCOSC digital interface
Section 31.3.1, Register
transfer error..."
Section 31.3.1.1, IRCOSC Control register
to RW from RO
27: RAM controller
Chapter 28, Flash memory controller (PFLASH Controller)
Section 1.5.1.7.3, PFlash Calibration Region Descriptor n, Word2
(PFCRDn.Word2): set bits 0–15 to "Reserved" (were fields "M0EN–
M15EN")
Chapter 29, Embedded Flash Memory (MP55): substantial changes
DocID027809 Rev 4
Changes
configuration:
equation—removed factor of 2 to denominator
pll_phi1
equation—removed factor of 2 to numerator
pll_VCO
equation—removed PLL1DV[PREDIV] from
pll_VCO
equation which shows the equality with f
pll_VCO
supervisor: added notes for LFREF and HFREF
(MC_CGM): unchanged
configurations:
descriptions: removed note "Module generates
delay: revised first paragraph
descriptions: removed note "Module generates
(PRAM): unchanged
Revision history
frequencies: Changed the
pll_ref
(IRCOSC_CTL): changed bit 7
2049/2058
clocking.
2057