STMicroelectronics SPC572L series Reference Manual page 2047

RM0400
Date
27-Feb-2015
Table 1150. Revision history(Continued)
Rev
Chapter 9: Device Configuration Format (DCF) Records
Table 110: Series of DCF records in UTEST flash
address offset "8n-1" to "8n" and "8n" to "8(n+1)".
Figure 44 (Appending DCF
Revised testin Warning immediately before this figure and in text
immediately after it.
Section 9.5, DCF client
Table 112: DCF client
• Removed "Flash special strategy" column
• Added "STCU" section
• Updated client "Censorship" row
• Changed LOCKn_PGm reset values to 0xFFFF_FFFF
• Changed IPS read direct access to 'no' for LOCKn_PGm clients
• Removed client "Life Cycle (LCSTAT)" row
• In BAF 'Soft' Clients section, changed DCF addresses from hexadecimal
to binary
Section 9.5.3, Miscellaneous DCF
– Set bit 16 to "OPT_RGM_ESR0_HW" (was Reserved) and bits 13–15 to
"XOSC_IBIAS_SEL" (were Reserved)
– Added note "To know the capacitance values relative to the 5-bit binary
combinations" to XOSC LOAD CAP SEL[0:4] field description
– Removed register "PMC_REE"
Chapter 10: Power management
Throughout chapter: removed all references to "HVD"; removed "[DEST]"
Rev 3
from phase names
(cont'd)
Updated Figure 51 (Internal LVD and HVD in configuration example during
power-up)
Table 119: POR and voltage monitors
Updated and restructured content.
Table 121: Voltage monitors
Updated and restructured content.
Updated Figure 53 (Example of VDD_LV power-up sequencing)
Removed figure: Threshold variation during power-up sequence: hot point
LVD disabled.
Chapter 11: Security
Section 11.1, Basic
11: Calibration and
12: Core e200z215An3
Chapter 16: System Integration Unit Lite2
Chapter 17: Crossbar Switch (XBAR)
Throughout chapter: removed all references to the following register
instances: "XBAR0_PRS3", "XBAR0_CRS3", "XBAR0_PRS4",
"XBAR0_CRS4", "XBAR0_PRS5", "XBAR0_CRS5", "XBAR0_PRS6",
"XBAR0_CRS6", "XBAR0_PRS7", "XBAR0_CRS7"
Chapter 20: Peripheral
DocID027809 Rev 4
Changes
records): removed "overwrite" and arrow.
table: added "UTEST" in Parity description
list:
registers:
description[[Lavaredo]]:
configurability[[Lavaredo]]:
security: replaced word 'BAM' with 'BAF'
Debug: unchanged
description: unchanged
(SIUL2): unchanged
Bridge: unchanged
Revision history
memory: changed
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2057