STMicroelectronics SPC572L series Reference Manual page 2048

Revision history
Date
27-Feb-2015
2048/2058
Table 1150. Revision history(Continued)
Rev
Chapter 7: System Memory Protection Unit
Chapter 17, Intelligent AHB Gasket (IAHBG): unchanged
Chapter 18, Interrupt Controller (INTC)
Section 1.1,
Section 1.2, Block
account for all possible processor combinations
Section 1.5.2.3, INTC Current Priority Register for Processor n
(INTC_CPRn): changed "PRI" field width from 4 to 6 to encompass bits
26–31
Section 1.5.2.6, INTC Software Set/Clear Interrupt Registers
(INTC_SSCIR0–INTC_SSCIR31): changed "... can write to the CLR bit
and not the SET bit, otherwise ..." to "... can write to the CLR bit,
otherwise ..."
Section 1.5.2.7, INTC Priority Select Registers (INTC_PSR0 –
INTC_PSR1023): changed "PRIn" field width from 4 to 6 to encompass
bits 26–31
Section 1.7.5.2.2, Raised priority
• Deleted the text "Also, during the epilog of the interrupt exception
handler..."
• Replaced the timing diagram and associated table of event descriptions.
Completely replaced
Chapter 25: Enhanced Direct Memory Access (eDMA)
Rev 3
Section 25.3.24, TCD Transfer Attributes
SSIZE field description
(cont'd)
Table 326: DMA_TCDn_CSR field
in "BWC" field description.
Chapter 1: Direct Memory Access Multiplexer (DMAMUX)
Throughout chapter: replaced "DMA Mux" with "DMAMUX"; changed
Channel Configuration registers to "CHCFG0–CHCFG15" (were
"CHCONFIG0–CHCONFIG15")
Renamed chapter (was "DMACHMUX")
Updated Section 1.2.3, Modes of operation
Removed section "Overview"
Section 1.4, Memory map/register
– Renamed (was "Memory map and register definition")
– Updated introduction
Table 8: DMAMUX memory
– Renamed (was "DMACHMUX memory map")
– Updated entirely
Removed Section "Register descriptions" and left its subsections
Removed table "Channel and trigger enabling"
Updated Section 1.6.2, Enabling and configuring sources
Chapter 21: Clocking
Figure 173 (Clock
to XBAR_CLK from PBRIDGEx_CLK.
Added Section 21.5.1.4, PLLDIG initialization
DocID027809 Rev 4
Changes
Introduction: changed number of priorities from 16 to 64
diagram: revised the stem sentence and figure title to
preserved:
Section 1.7.10, Examining LIFO contents
descriptions: changed "XBS" to "XBAR"
definition:
map:
distribution): updated clock source for BIU on the GTM
(SMPU): unchanged
(DMA_TCDn_ATTR): revised the
information.
RM0400