Features - STMicroelectronics SPC572L series Reference Manual

RM0400
69.1.2

Features

The WKPU supports these distinctive features:
•
one external NMI source
•
one analog glitch filter
•
independent interrupt destination for the core:
–
–
–
•
13 I/O external interrupts: 4–14, 20, and 21 wakeup lines
•
active edge selection control for events to the core and functional reset event to
MC_RGM
•
configurable wakeup event from low power mode to the MC_ME
•
configurable wakeup event to exit from STOP mode to the MC_ME
•
WKPU register configuration lock
69.2 External signal description
Active-edge-selectable, alternate-function pin PA[4] triggers the wakeup unit. See "Signal
Description" chapter for further pin details.
69.3 Memory map and register description
This section provides a detailed description of all registers accessible in the WKPU module.
69.3.1 Memory map
Table 1142
Address offset
0x0000
0x0004
0x0008
0x0014
0x0018
0x001C – 0x0027
Wakeup/Interrupt Rising-Edge Event
0x0028
non-maskable interrupt
critical interrupt
machine check request
gives an overview of the WKPU registers.
Table 1142. WKPU memory map
Register
NMI Status Flag Register (NSR)
NMI Configuration Register (NCR)
Wakeup/Interrupt Status Flag
Register (WISR)
Interrupt Request Enable Register
(IRER)
Enable Register (WIREER)
Size
(bits)
32
Reserved
32
32
32
Reserved
32
DocID027809 Rev 4
Wakeup Unit (WKPU)
Supported access sizes
(bits)
32/16/8
32/16/8
32
32
32
Location
on page 2014
on page 2015
on page 2017
on page 2018
on page 2018
2013/2058
2023