Figure 1193.Change Lock Settings For 32-Bit Protected Addresses - STMicroelectronics SPC572L series Reference Manual

RM0400
In Figure 1194
The data written to SLBRn.SLB[0] is mirrored to SLBRn.SLB[1] as the corresponding
register is 16-bit protected. The data written to SLBRn.SLB[2] is blocked as the
corresponding register is unprotected. The data written to SLBRn.SLB[3] is written to
SLBRn.SLB[3].
67.4.2.2 Enable locking via mirror module space (Area #3)
It is possible to enable locking for a register after writing to it. To do so the mirrored module
address space must be used.
16-Bit write to address 0x0008
no change
0 0 0 0 0 0 0 0
SLB[3:0]
WE[3:0]
When writing to address 0x0008 the registers MR9 and MR8 in the protected module are
updated. The corresponding lock bits remain unchanged (left part of
Figure 1193. Change lock settings for 32-bit protected addresses
to SLB0 to SLB1 to SLB2 to SLB3
1 X
SLB0 SLB1
an example is shown which has a mixed protection size configuration:
Figure 1194. Change lock settings for mixed protection
to SLB0 to SLB1 to SLB2 to SLB3
1 X
SLB0 SLB1
Figure 1195
Figure 1195. Enable Locking Via Mirror Module Space (Area #3)
write to
MR[9:8]
SLBR2
DocID027809 Rev 4
write data
X X SLBRn.WE[3:0]
update lock bits
SLB2 SLB3
SLBR.SLB[3:0]
write data
X 1 SLBRn.WE[3:0]
update lock bits
0 SLB3
SLBR
shows one example:
16-Bit write to address 0x2008
set lock bits
0 0 0 0 1 1 0 0
WE[3:0]
Register Protection (REG_PROT)
write to
SLBR2
SLB[3:0]
Figure 1192).
MR[9:8]
1991/2058
1993