About The Arm966E-S Memory Map; Figure 3-1 Arm966E-S Memory Map - ARM ARM966E-S Technical Reference Manual

Memory Map
3.1

About the ARM966E-S memory map

3-2
The ARM966E-S couples Instruction and Data SRAM memories of configurable size
to the ARM9E-S core. This allows high-speed operation without incurring the
performance and power penalties of accessing the system bus. A write buffer is used to
minimize traffic on the AHB bus.
To provide simple control over the SRAM and write buffer, a fixed memory map is
implemented within the ARM966E-S. Figure 3-1 illustrates this map.
0xFFFF FFFF
0xF000 0000
0x2FFF FFFF
0x2000 0000
0x1FFF FFFF
0x1000 0000
0x0FFF FFFF
0x0800 0000
0x07FF FFFF
0x0400 0000
0x03FF FFFF
0x0000 0000
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256MB AHB unbuffered
256MB AHB buffered
256MB AHB unbuffered
128MB AHB buffered
64MB D-SRAM
64MB I-SRAM

Figure 3-1 ARM966E-S memory map

AMBA AHB
Tightly-coupled
SRAM
ARM DDI 0186A