Table 11-25 Itm Integration Mode Control Register Bit Assignments; Table 11-26 Itm Lock Access Register Bit Assignments; Figure 11-17 Itm Integration Mode Control Bit Assignments - ARM Cortex-M3 Technical Reference Manual

31
Bits Field
[31:0] Lock Access
ARM DDI 0337G
Unrestricted Access
Figure 11-17 on page 11-37 shows the ITM Integration Mode Control Register bit
assignments.
Table 11-25 describes the bit assignments of the ITM Integration Mode Control
Register

Table 11-25 ITM Integration Mode Control Register bit assignments

Bits Field
[31:1] -
[0] INTEGRATION
ITM Lock Access Register
Use this register to prevent write accesses to the Control Register.
Table 11-26 describes the bit assignments of the ITM Lock Access Register
Function
A privileged write of
0xC5ACCE55
invalid write removes write access.
ITM Lock Status Register
Use this register to enable write accesses to the Control Register.
Figure 11-18 on page 11-38 shows the ITM Lock Status Register bit assignments.
Copyright © 2005-2008 ARM Limited. All rights reserved.
Reserved

Figure 11-17 ITM Integration Mode Control bit assignments

Function
Reserved
0 = ATVALIDM normal
1 = ATVALIDM driven from Integration Write Register

Table 11-26 ITM Lock Access Register bit assignments

enables more write access to Control Register
Non-Confidential
System Debug
1
0
INTEGRATION
. An
0xE00::0xFFC
11-37