ARM Versatile/IT1 User Manual

Interface tile

Hide thumbs

Table Of Contents

Table of Contents

Quick Links

Download this manual

Versatile/IT1

Interface Tile

User Guide

ARM DUI 0188C

Table of Contents

Summary of Contents for ARM Versatile/IT1

Page 2 This document is intended only to assist the reader in the use of the product. ARM Limited shall not be liable for any loss or damage arising from the use of any information in this document, or any error or omission in such information, or any incorrect use of the product.
Page 3: Table Of Contents
Connector signals ..................A-2 User LEDs and switches ................A-19 Clock signals ..................... A-20 Prototyping pads ..................A-21 Appendix B Specifications Electrical specification ................. B-2 Mechanical details ..................B-3 ARM DUI 0188C Copyright © 2004-2007. ARM Limited. All rights reserved.
Page 5 HDRY signals ......................A-3 Table A-3 HDRZ signals ......................A-5 Table A-4 Prototyping pad signals ................... A-22 Table B-1 Electrical characteristics for 3.3V I/O ................ B-2 Table B-2 Current requirements ....................B-2 ARM DUI 0188C Copyright © 2004-2007. ARM Limited. All rights reserved.
Page 7 I2C block diagram ....................A-17 Figure A-16 JTAG logic ....................... A-18 Figure A-17 I2C and JTAG connector J1 ..................A-18 Figure A-18 User switch and LED signals .................. A-19 ARM DUI 0188C Copyright © 2004-2007. ARM Limited. All rights reserved.
Page 8 List of Figures Figure A-19 Clock signals ......................A-20 Figure A-20 Prototyping pad locations ..................A-21 Figure B-1 Location of headers and mounting holes ..............B-3 viii Copyright © 2004-2007. ARM Limited. All rights reserved. ARM DUI 0188C...
Page 9: Preface
Preface This preface introduces the ARM Versatile/IT1 Interface Tile and associated reference documentation. It contains the following sections: • About this document on page x • Further reading on page xii • Feedback on page xiii. ARM DUI 0188C Copyright © 2004-2007. ARM Limited. All rights reserved.
Page 10: About This Document
Intended audience This document has been written for experienced hardware and software developers to aid the development of ARM-based products using the Interface Tile as part of a development system consisting of a system baseboard, one or more Versatile/LT-XC2V4000+, a Versatile Core Tile, and an Interface Tile.
Page 11 Highlights interface elements, such as menu names and buttons. Also used for terms in descriptive lists, where appropriate. monospace bold Denotes language keywords when used outside example code and ARM processor signal names. ARM DUI 0188C Copyright © 2004-2007. ARM Limited. All rights reserved.
Page 12: Further Reading
Preface Further reading This section lists related publications by ARM Limited and other companies provide additional information. ARM publications The following publications provide information about related ARM products and toolkits: ™ • Multi-ICE User Guide (ARM DUI 0048) ™ •...
Page 13: Feedback
Preface Feedback ARM Limited welcomes feedback both on the Interface Tile and on the documentation. Feedback on this document If you have any comments about this document, please send email to errata@arm.com giving: • the document title • the document number •...
Page 15: Chapter 1 Introduction
Chapter 1 Introduction This chapter introduces the Interface Tile. It contains the following section: • About the Interface Tile on page 1-2 • Precautions on page 1-6. ARM DUI 0188C Copyright © 2004-2007. ARM Limited. All rights reserved.
Page 16: About The Interface Tile
Figure 1-1 Interface Tile mounted on Logic Tiles and interface Module Figure 1-2 on page 1-3 shows the Interface Tile with a Logic Tile mounted on the tile expansion headers of a Versatile/PB926EJ-S. Copyright © 2004-2007. ARM Limited. All rights reserved. ARM DUI 0188C...
Page 17: Figure 1-2 Interface Tile Mounted On Logic Tile And Versatile/Pb926Ej-S
Figure 1-3 on page 1-4 shows a simplified view of the interfaces on the tile (the JTAG, tile detect, clock, and peripheral enable logic are not shown in detail). ARM DUI 0188C Copyright © 2004-2007. ARM Limited. All rights reserved.
Page 18: Figure 1-3 Interface Tile Block Diagram
USB OTG S2[8:1] D[8:1] (J5, OTG) Y[36:0] (J6, 40-way IDC) HDRY Figure 1-3 Interface Tile block diagram Figure 1-4 on page 1-5 shows the layout of the Interface Tile. Copyright © 2004-2007. ARM Limited. All rights reserved. ARM DUI 0188C...
Page 20: Precautions
Caution Do not use the board near equipment which is: • sensitive to electromagnetic emissions (such as medical equipment) • a transmitter of electromagnetic emissions. Copyright © 2004-2007. ARM Limited. All rights reserved. ARM DUI 0188C...
Page 21: Chapter 2 Getting Started
This chapter describes how to set up and prepare the Interface Tile for use. It contains the following sections: • Fitting the Interface Tile to a logic tile on page 2-2 • Setting the peripheral enable switches on page 2-3. ARM DUI 0188C Copyright © 2004-2007. ARM Limited. All rights reserved.
Page 22: Fitting The Interface Tile To A Logic Tile
There are many other possible combinations of Interface Tile, Core Tile, Analyzer Tile, Versatile Logic Tile, and baseboards. Some tile configurations require specific FPGA images. See the ARM website at for more information on tile products. www.arm.com Copyright © 2004-2007. ARM Limited. All rights reserved. ARM DUI 0188C...
Page 23: Setting The Peripheral Enable Switches
UART_nDCD, and UART_nRI S1-6 I2C_nRST, I2C1_nCS, I2C2_nCS, I2C1_nINT, and Z[211:195] I2C2_nINT S1-7 USB 1 and 2 USB1_nOE, USB1_RCV, USB1_VP, USB1_VM, Z[230:212] USB2_nRST, and USB2_RCV S1-7 IDE_RST and IDE_nOE[2:0] Y[36:0] ARM DUI 0188C Copyright © 2004-2007. ARM Limited. All rights reserved.
Page 25: Appendix A Signals And Pinouts
This index provides a summary of signals present on the Interface Tile. It contains the following sections: • Connector signals on page A-2 • User LEDs and switches on page A-19 • Clock signals on page A-20 • Prototyping pads on page A-21. ARM DUI 0188C Copyright © 2004-2007. ARM Limited. All rights reserved.
Page 26: Connector Signals
Even signals are on one connector row and odd signals are on the other row. See the schematic for more details on header signals. Figure A-1 Header connector voltages Copyright © 2004-2007. ARM Limited. All rights reserved. ARM DUI 0188C...
Page 27: Table A-1 Hdrx Signals
Table A-2 lists the signals on the HDRY connector and the associated prototyping and peripheral signal. Table A-2 HDRY signals Generic tile Prototyping Interface Tile Effect of peripheral signal signal enable switches Y[15:0] IDE_D[15:0] IDE_nIOW IDE_nIOR IDE_DMAACK ARM DUI 0188C Copyright © 2004-2007. ARM Limited. All rights reserved.
Page 28 IDE_PASSDIAG IDE_nACTIVE Y[33:31] IDE_BDIR[2:0] Y[36:34] IDE_nBOE[2:0] isolated by SW8 Y[68:61] LED[7:0] Y[76:69] SW[7:0] Y[79:77] T12-T10 Y[89:80] V10-V1 Y[91:90] V12-V11 Y[103:92] W12-W1 Y[115:104] Y12-Y1 Y[127:116] Z12-Z1 Y[135:128] Y22-Y15 Y[143:136] Z22-Z15 Copyright © 2004-2007. ARM Limited. All rights reserved. ARM DUI 0188C...
Page 29: Table A-3 Hdrz Signals
CLK_GLOBAL_nEN on prototyping area is pulled LOW) CLK_POS_UP_OUT CLK_POS_UP_IN (default) EXT_CLK_POS_UP_IN (selected by LK2) CLK_POS_UP_IN CLK_POS_UP_OUT CLK_POS_DN_IN CLK_POS_DN_OUT CLK_POS_DN_OUT CLK_POS_DN_IN (default) EXT_CLK_POS_DN_IN (selected by LK1) Z[127:0] Z128 DAC_CLK Z129 DAC_DIN ARM DUI 0188C Copyright © 2004-2007. ARM Limited. All rights reserved.
Page 30 UART_nDSR isolated by buffer (SW5) Z146 UART_nDCD isolated by buffer (SW5) Z147 UART_nRI isolated by buffer (SW5) Z[151:148] B12-B9 Z152 STEPPER1_IN[1] Z153 STEPPER1_IN[2] Z154 STEPPER1_IN[3] Z155 STEPPER1_IN[4] Z156 STEPPER2_IN[1] Copyright © 2004-2007. ARM Limited. All rights reserved. ARM DUI 0188C...
Page 31 SW6 Z[205:204] I2C_A[1:0] Z206 I2C1_nCS isolated by SW6 Z207 I2C2_nCS isolated by SW6 Z208 I2C_nRD Z209 I2C_nWR Z210 I2C1_nINT isolated by SW6 Z211 I2C2_nINT isolated by SW6 Z212 USB1_MODE ARM DUI 0188C Copyright © 2004-2007. ARM Limited. All rights reserved.
Page 32 USB2_VM Z230 USB2_RCV isolated by SW7 Z[255:231] A.1.2 UART Figure A-2 on page A-9 shows the UART block diagram and Figure A-3 on page A-9 shows the UART connector. Copyright © 2004-2007. ARM Limited. All rights reserved. ARM DUI 0188C...
Page 33: Figure A-2 Uart Block Diagram
SER_RTS SER_TX SER_CTS SCR_DTR SER_RI Figure A-3 UART connector J9 A.1.3 Stepper Figure A-2 shows the stepper block diagram and Figure A-5 on page A-10 shows the stepper connector. ARM DUI 0188C Copyright © 2004-2007. ARM Limited. All rights reserved.
Page 34: Figure A-4 Stepper Block Diagram
Figure A-6 on page A-11 shows the camera connector and signal connections. There is no isolation logic for the camera signals. To isolate the tile signals, remove the camera from the socket. A-10 Copyright © 2004-2007. ARM Limited. All rights reserved. ARM DUI 0188C...
Page 35: Figure A-6 Camera Connector J7
CAM_nRESET CAM_STANDBY Figure A-6 Camera connector J7 A.1.5 Figure A-7 on page A-12 shows the CAN block diagram and Figure A-8 on page A-12 shows the CAN connector. ARM DUI 0188C Copyright © 2004-2007. ARM Limited. All rights reserved. A-11...
Page 36: Figure A-7 Can Block Diagram
Figure A-8 CAN connector J4 A.1.6 ADC and DAC Figure A-9 on page A-13 shows the ADC/DAC block diagram and Figure A-10 on page A-13 shows the ADC/DAC connector. A-12 Copyright © 2004-2007. ARM Limited. All rights reserved. ARM DUI 0188C...
Page 37: Figure A-9 Adc/Dac Block Diagram
Figure A-11 on page A-14 shows the IDE block diagram (not all pullup and pulldown resistors are shown) and Figure A-12 on page A-15 shows the IDE connector. ARM DUI 0188C Copyright © 2004-2007. ARM Limited. All rights reserved. A-13...
Page 38: Figure A-11 Ide Block Diagram
Y26, IDE_IORDY B_IDE_IORDY Y27, IDE_IRQR B_IDE_IRQR Y28, IDE_nIOCS16 B_IDE_nIOCS16 Y29, IDE_PASSDIAG B_IDE_PASSDIAG Y30, IDE_nACTIVE B_IDE_nACTIVE Y33, IDE_BDIR2 P174ALVCH IDE_nBOE2 164245 (U13) Y24_IDE_RST B_IDE_nRST S1-8 Figure A-11 IDE block diagram A-14 Copyright © 2004-2007. ARM Limited. All rights reserved. ARM DUI 0188C...
Page 39: Figure A-12 Ide Connector J6
Figure A-13 on page A-16 shows the USB block diagram (not all pullup and pulldown resistors are shown) and Figure A-14 on page A-16 shows the host and OTG USB connectors. ARM DUI 0188C Copyright © 2004-2007. ARM Limited. All rights reserved. A-15...
Page 40: Figure A-13 Usb Block Diagram
Z229, USB2_VM Z230 USB2_RCV S1-7 Figure A-13 USB block diagram Figure A-14 USB connectors A.1.9 I2C and JTAG Figure A-15 on page A-17 shows the I2C block diagram. A-16 Copyright © 2004-2007. ARM Limited. All rights reserved. ARM DUI 0188C...
Page 41: Figure A-15 I2C Block Diagram
S1-6 Figure A-15 I2C block diagram Figure A-16 on page A-18 shows the JTAG logic. Note Remove resistor R1 to use the JTAG connector on the Interface tile. ARM DUI 0188C Copyright © 2004-2007. ARM Limited. All rights reserved. A-17...
Page 42: Figure A-16 Jtag Logic
HDRZ (lower) Figure A-16 JTAG logic Figure A-17 shows the I2C and JTAG connector. C_TMS B_C_TCK C_TDO_IN C_TDO_OUT I2C1_SDA I2C2_SDA I2C2_SCL I2C2_SCL Figure A-17 I2C and JTAG connector J1 A-18 Copyright © 2004-2007. ARM Limited. All rights reserved. ARM DUI 0188C...
Page 43: User Leds And Switches
Signals and Pinouts User LEDs and switches Figure A-18 shows the signals for the user LEDs and switches. Figure A-18 User switch and LED signals ARM DUI 0188C Copyright © 2004-2007. ARM Limited. All rights reserved. A-19...
Page 44: Clock Signals
Figure A-19 shows the clock signals on the upper and lower HDRZ headers and the clock-selection links. HDRZ (upper) R_CLK_POS_DN_OUT 3.3V CLK_GLOBAL_IN EXT_CLK_POS_UP_IN CLK_GLOBAL_nEN EXT_CLK_POS_DN_IN CLK_GLOBAL_OUT R_CLK_POS_UP_OUT HDRZ (lower) Figure A-19 Clock signals A-20 Copyright © 2004-2007. ARM Limited. All rights reserved. ARM DUI 0188C...
Page 45: Prototyping Pads
Use the Peripheral Enable switch S1 to disable signals to the CAN, DAC, ADC, UART, I2C, USB, or IDE devices if you are using these signals on the prototyping pad. ARM DUI 0188C Copyright © 2004-2007. ARM Limited. All rights reserved. A-21...
Page 46: Table A-4 Prototyping Pad Signals
Signals and Pinouts Table A-4 Prototyping pad signals Pad hole ref Signal A12-1 Z[139:128] BA13 B12-1 Z[151:140] C13-0 D12-1 Z[163:152] E12-1 Z[175:164] A-22 Copyright © 2004-2007. ARM Limited. All rights reserved. ARM DUI 0188C...
Page 47 Signals and Pinouts Table A-4 Prototyping pad signals (continued) Pad hole ref Signal F13-0 VCCOX G12-1 X[11:0] VCCOX H12-1 X[23:12] VCCOX I13-0 VCCOX J12-1 X[35:24] VCCOX K12-1 X[47:36] ARM DUI 0188C Copyright © 2004-2007. ARM Limited. All rights reserved. A-23...
Page 48 Signals and Pinouts Table A-4 Prototyping pad signals (continued) Pad hole ref Signal VCCOX L13-0 VCCOX M12-1 X[59:48] VCCOX N12-1 X[71:60] VCCOX O13-9 VCCOX P12-1 X[83:72] VCCOX Q12-1 X[95:84] A-24 Copyright © 2004-2007. ARM Limited. All rights reserved. ARM DUI 0188C...
Page 49 Signals and Pinouts Table A-4 Prototyping pad signals (continued) Pad hole ref Signal VCCOX R13-0 VCCOY S12-9 SPARE[3:0] S8-1 X[103:96] VCCOY T12-10 Y[79:77] T9-1 SPARE[12:4] VCCOY U13-0 V12-1 Y[91:80] W22-16 ARM DUI 0188C Copyright © 2004-2007. ARM Limited. All rights reserved. A-25...
Page 50 Table A-4 Prototyping pad signals (continued) Pad hole ref Signal W12-1 Y[103:92] EXT_CLK_POS_DN_IN EXT_CLK_POS_UP_IN CLK_GLOBAL_IN B_CLK_POS_DN_OUT B_CLK_POS_UP_OUT CLK_GLOBAL_OUT CLK_GLOBAL_nEN X13-0 Y22-15 Y[135:128] Y12-1 Y[115:104] Z22-15 Y[143:136] Z12-1 Y[127:116] A-26 Copyright © 2004-2007. ARM Limited. All rights reserved. ARM DUI 0188C...
Page 51 Signals and Pinouts Table A-4 Prototyping pad signals (continued) Pad hole ref Signal AA22-15 AA14 AA13-0 AB22-15 X[135:128] AB14 AB13 AB12-1 X[115:104] AC22-15 X[143:136] AC14 AC13 AC12-1 X[127:116] ARM DUI 0188C Copyright © 2004-2007. ARM Limited. All rights reserved. A-27...
Page 53: Appendix B Specifications
This appendix describes the mechanical and electrical specifications for the Interface Tile. It contains the following sections: • Electrical specification on page B-2 • Mechanical details on page B-3. ARM DUI 0188C Copyright © 2004-2007. ARM Limited. All rights reserved.
Page 54: Electrical Specification
The driver output pins for the stepper motor can each sink 500ma at up to 25V supply. The stepper motor voltage must be supplied by an external power supply. Table B-2 Current requirements At 3.3V At 5V 20mA 130mA Copyright © 2004-2007. ARM Limited. All rights reserved. ARM DUI 0188C...
Page 55 The Interface Tile is designed to be stackable on Logic Tiles or Core Tiles. Figure B-1 shows the mechanical outline and location of the tile headers and mounting holes. Figure B-1 Location of headers and mounting holes ARM DUI 0188C Copyright © 2004-2007. ARM Limited. All rights reserved.
Page 57 Logic TIle 2-2 stepper A-9 JTAG A-17 VPB926EJ-S 1-3 UART A-8 stepper A-9 Interface Tile USB A-15 UART A-8 layout 1-4 user switches A-19 USB A-15 I2C A-16 ARM DUI 0188C Copyright © 2004-2007. ARM Limited. All rights reserved. Index-1...
Page 58 I2C A-16 JTAG A-17 LEDS A-19 prototyping A-21 stepper A-9 UART A-8 USB A-15 user switches A-19 Specification layout 1-4 Stepper A-9 Switches configuration 2-3 user A-19 UART A-8 Index-2 Copyright © 2004-2007. ARM Limited. All rights reserved. ARM DUI 0188C...

ARM Versatile/IT1 User Manual

Chapter 1 Introduction

Chapter 2 Getting Started

Appendix A Signals and Pinouts

Appendix B Specifications

Quick Links

Related Manuals for ARM Versatile/IT1

Summary of Contents for ARM Versatile/IT1

Table of Contents