Arm966E-S Trace Support Features - ARM ARM966E-S Technical Reference Manual

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Embedded Trace Macrocell Interface
9.3

ARM966E-S trace support features

9.3.1
FIFOFULL
9.3.2
Register 15, trace control register
9.3.3
Register 1, Trace process identifier
9-4
The trace support uses the following features:
FIFOFULL
Register 15, trace control register
Register 1, Trace process identifier.
The signal, FIFOFULL, is an input to the ARM966E-S driven by the ETM9. Whenever
the programmed upper watermark of the ETM FIFO is filled, FIFOFULL is asserted.
The ARM966E-S uses FIFOFULL to stall the ARM9E-S core, preventing trace loss.
The ARM9E-S core remains stalled until FIFOFULL is deasserted.
The ARM966E-S can only stall on instruction boundaries enabling any current AHB
transfers to complete. You must take this into consideration when programming the
ETM FIFO watermark. If the current instruction is either a
have to accept up to 16 words after the assertion of FIFOFULL.
Note
Using FIFOFULL to stall the ARM966E-S affects real-time operating performance.
The trace control register allows the masking of interrupts during trace. This register
allows nIRQ and nFIQ interrupt priority over FIFOFULL to be programmed. The
operation of this register is described in Register 15, Test on page 2-9.
The ARM966E-S contains a trace process identifier register that allows Real-time Trace
tools to identify the currently executing process in multi-tasking environments. The
operation of this register is described in Register 13, Trace process identifier on
page 2-9.
Copyright © 2000 ARM Limited. All rights reserved.
or a
, the FIFO might
LDM
STM
ARM DDI 0186A

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