ST STM32L4+ Series Manuals

Manuals and User Guides for ST STM32L4+ Series. We have 3 ST STM32L4+ Series manuals available for free PDF download: Reference Manual, Programming Manual, User Manual

ST STM32L4+ Series Reference Manual

ST STM32L4+ Series Reference Manual (2301 pages)

Brand: ST | Category: Computer Hardware | Size: 45 MB

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ST STM32L4+ Series Programming Manual

ST STM32L4+ Series Programming Manual (260 pages)

Cortex-M4

Brand: ST | Category: Computer Hardware | Size: 3 MB

Table of Contents

Reference Documents
1
Table of Contents
2
About this Document

12
The Cortex-M4 Processor

16
The STM32 Cortex-M4 Instruction Set

49
- Instruction Set Summary
  49
- Table 20. Cortex-M4 Instructions
  49
- CMSIS Intrinsic Functions
  57
- Table 21. CMSIS Intrinsic Functions to Generate some Cortex-M4 Instructions
  58
- Table 22. CMSIS Intrinsic Functions to Access the Special Registers
  58
- About the Instruction Descriptions
  59
  - Operands
    59
  - Restrictions When Using PC or SP
    59
  - Flexible Second Operand
    59
  - Shift Operations
    61
  - Figure 13. ASR #3
    61
  - Figure 14. LSR #3
    62
  - Figure 15. LSL #3
    62
  - Figure 16. ROR #3
    63
  - Figure 17. RRX #3
    63
  - Address Alignment
    64
  - PC-Relative Expressions
    64
  - Conditional Execution
    64
  - Table 23. Condition Code Suffixes
    66
  - Instruction Width Selection
    67
- Memory Access Instructions
  68
  - Table 24. Memory Access Instructions
    68
  - Adr
    69
  - LDR and STR, Immediate Offset
    70
  - Table 25. Immediate, Pre-Indexed and Post-Indexed Offset Ranges
    71
  - LDR and STR, Register Offset
    72
  - LDR and STR, Unprivileged
    73
  - LDR, PC-Relative
    74
  - Table 26. Label-PC Offset Ranges
    74
  - LDM and STM
    75
  - PUSH and POP
    77
  - LDREX and STREX
    78
  - Clrex
    79
- General Data Processing Instructions
  80
  - Table 27. Data Processing Instructions
    80
  - ADD, ADC, SUB, SBC, and RSB
    82
  - AND, ORR, EOR, BIC, and ORN
    84
  - ASR, LSL, LSR, ROR, and RRX
    85
  - Clz
    86
  - CMP and CMN
    87
  - MOV and MVN
    88
  - Movt
    90
  - REV, REV16, REVSH, and RBIT
    91
  - SADD16 and SADD8
    92
  - SHADD16 and SHADD8
    93
  - SHASX and SHSAX
    94
  - SHSUB16 and SHSUB8
    95
  - SSUB16 and SSUB8
    96
  - SASX and SSAX
    97
  - TST and TEQ
    98
  - UADD16 and UADD8
    99
  - UASX and USAX
    100
  - UHADD16 and UHADD8
    101
  - UHASX and UHSAX
    102
  - UHSUB16 and UHSUB8
    103
  - Sel
    104
  - Usad8
    105
  - Usada8
    106
  - USUB16 and USUB8
    107
- Multiply and Divide Instructions
  108
  - Table 28. Multiply and Divide Instructions
    108
  - MUL, MLA, and MLS
    109
  - UMULL, UMAAL and UMLAL
    110
  - SMLA and SMLAW
    111
  - Smlad
    113
  - SMLAL and SMLALD
    114
  - SMLSD and SMLSLD
    116
  - SMMLA and SMMLS
    118
  - Smmul
    119
  - SMUAD and SMUSD
    120
  - SMUL and SMULW
    121
  - UMULL, UMLAL, SMULL, and SMLAL
    122
  - SDIV and UDIV
    123
- Saturating Instructions
  124
  - Table 29. Saturating Instructions
    124
  - SSAT and USAT
    125
  - SSAT16 and USAT16
    126
  - QADD and QSUB
    127
  - QASX and QSAX
    128
  - QDADD and QDSUB
    129
  - UQASX and UQSAX
    130
  - UQADD and UQSUB
    131
- Packing and Unpacking Instructions
  133
  - Table 30. Packing and Unpacking Instructions
    133
  - PKHBT and PKHTB
    134
  - SXT and UXT
    135
  - SXTA and UXTA
    136
- Bitfield Instructions
  137
  - Table 31. Instructions that Operate on Adjacent Sets of Bits
    137
  - BFC and BFI
    138
  - SBFX and UBFX
    139
  - SXT and UXT
    140
  - B, BL, BX, and BLX
    141
  - Branch and Control Instructions
    141
  - Table 32. Branch and Control Instructions
    141
  - Table 33. Branch Ranges
    142
  - CBZ and CBNZ
    143
  - TBB and TBH
    146
- Floating-Point Instructions
  148
  - Table 34. Floating-Point Instructions
    148
  - Vabs
    150
  - Vadd
    151
  - Vcmp, Vcmpe
    152
  - VCVT, VCVTR between Floating-Point and Integer
    153
  - VCVT between Floating-Point and Fixed-Point
    154
  - Vcvtb, Vcvtt
    155
  - VDIV
    156
  - Vfma, Vfms
    157
  - Vfnma, Vfnms
    158
  - Vldm
    159
  - Vldr
    160
  - Vlma, Vlms
    161
  - VMOV Immediate
    162
  - VMOV Register
    163
  - VMOV Scalar to ARM Core Register
    164
  - VMOV ARM Core Register to Single Precision
    165
  - VMOV Two ARM Core Registers to Two Single Precision
    166
  - VMOV ARM Core Register to Scalar
    167
  - Vmrs
    168
  - Vmsr
    169
  - Vmul
    170
  - Vneg
    171
  - Vnmla, Vnmls, Vnmul
    172
  - Vpop
    173
  - Vpush
    174
  - Vsqrt
    175
  - Vstm
    176
  - Vstr
    177
  - Vsub
    178
- Miscellaneous Instructions
  179
  - Table 35. Miscellaneous Instructions
    179
  - Bkpt
    180
  - Cps
    181
  - Dmb
    182
  - Dsb
    183
  - Isb
    184
  - Mrs
    185
  - Msr
    186
  - Nop
    187
  - Sev
    188
  - Svc
    189
  - Wfe
    190
  - Wfi
    191
Core Peripherals

192
Revision History

259
- Table 57. Document Revision History
  259

ST STM32L4+ Series User Manual

ST STM32L4+ Series User Manual (110 pages)

Brand: ST | Category: Microcontrollers | Size: 1 MB

Table of Contents

1 About this Document

2
2 Device Development Process

4
3 Reference Safety Architecture

5
- Safety Architecture Introduction
  5
- Compliant Item
  5
- Safety Analysis Assumptions
  8
  - Safety Requirement Assumptions
    8
- Electrical Specifications and Environment Limits
  9
- Systematic Safety Integrity
  9
- Hardware and Software Diagnostics
  9
  - Table 2. SS1 and SS2 Safe State Details
    9
  - Arm Cortex -M4 CPU
    10
  - Table 3. CPU_SM_0
    10
  - Table 4. CPU_SM_1
    11
  - Table 5. CPU_SM_2
    12
  - Table 6. CPU_SM_3
    12
  - Table 7. CPU_SM_4
    13
  - Table 8. CPU_SM_5
    13
  - Table 10. CPU_SM_7
    14
  - Table 9. CPU_SM_6
    14
  - Table 11. CPU_SM_8
    15
  - Table 12. MPU_SM_0
    15
  - System Bus Architecture/Busmatrix
    16
  - Table 13. MPU_SM_1
    16
  - Table 14. BUS_SM_0
    16
  - Embedded SRAM
    17
  - Table 15. BUS_SM_1
    17
  - Table 16. RAM_SM_0
    17
  - Table 17. RAM_SM_1
    18
  - Table 18. RAM_SM_2
    19
  - Table 19. RAM_SM_3
    19
  - Table 20. RAM_SM_4
    20
  - Table 21. RAM_SM_5
    20
  - Embedded Flash Memory
    21
  - Table 22. RAM_SM_6
    21
  - Table 23. FLASH_SM_0
    21
  - Table 24. FLASH_SM_1
    22
  - Table 25. FLASH_SM_2
    22
  - Table 26. FLASH_SM_3
    23
  - Table 27. FLASH_SM_4
    23
  - Table 28. FLASH_SM_5
    23
  - Table 29. FLASH_SM_6
    24
  - Table 30. FLASH_SM_7
    24
  - Table 31. FLASH_SM_8
    25
  - Firewall (FW)
    26
  - Power Controller (PWR)
    26
  - Table 32. FLASH_SM_9
    26
  - Table 33. FWR_SM_0
    26
  - Table 34. VSUP_SM_0
    26
  - Table 35. VSUP_SM_1
    27
  - Table 36. VSUP_SM_2
    27
  - Table 37. VSUP_SM_3
    28
  - Table 38. VSUP_SM_4
    28
  - Reset and Clock Controller (RCC)
    29
  - Table 39. VSUP_SM_5
    29
  - Table 40. CLK_SM_0
    29
  - Table 41. CLK_SM_1
    30
  - Table 42. CLK_SM_2
    30
  - General-Purpose Input/Output (GPIO)
    31
  - Table 43. CLK_SM_3
    31
  - Table 44. GPIO_SM_0
    31
  - Table 45. GPIO_SM_1
    32
  - Table 46. GPIO_SM_2
    32
  - Debug System or Peripheral Control
    33
  - Table 47. GPIO_SM_3
    33
  - Table 48. DBG_SM_0
    33
  - Table 49. LOCK_SM_0
    33
  - System Configuration Controller (SYSCFG)
    34
  - Table 50. SYSCFG_SM_0
    34
  - Table 51. DIAG_SM_0
    34
  - Direct Memory Access Controller (DMA/ DMA2D/ DMAMUX))
    35
  - Table 52. DMA_SM_0
    35
  - Table 53. DMA_SM_1
    35
  - Table 54. DMA_SM_2
    36
  - Table 55. DMA_SM_3
    36
  - Table 56. DMA_SM_4
    37
  - Chrom-Art Accelerator Controller (DMA2D)
    38
  - Table 57. DMA2D_SM_0
    38
  - Table 58. DMA2D_SM_1
    38
  - Chrom-GRC™ (GFXMMU)
    39
  - Table 59. DMA2D_SM_2
    39
  - Table 60. GFX_SM_0
    39
  - Extended Interrupt and Events Controller (EXTI)
    40
  - Table 61. GFX_SM_1
    40
  - Table 62. NVIC_SM_0
    40
  - Cyclic Redundancy-Check Calculation Unit (CRC)
    41
  - Table 63. NVIC_SM_1
    41
  - Table 64. CRC_SM_0
    41
  - Flexible Static Memory Controller (FSMC)
    42
  - Table 65. FSMC_SM_0
    42
  - Table 66. FSMC_SM_1
    42
  - Table 67. FSMC_SM_2
    43
  - Table 68. FSMC_SM_3
    43
  - Quad-SPI Interface and Octo-SPI Interface (QUADSPI/OCTOSPI)
    44
  - Table 69. QSPI_SM_0
    44
  - Table 70. QSPI_SM_1
    44
  - Analog-To-Digital Converter (ADC)
    45
  - Table 71. QSPI_SM_2
    45
  - Table 72. ADC_SM_0
    45
  - Table 73. ADC_SM_1
    46
  - Table 74. ADC_SM_2
    46
  - Table 75. ADC_SM_3
    47
  - Table 76. ADC_SM_4
    47
  - Digital-To-Analog Converter (DAC)
    48
  - Table 77. DAC_SM_0
    48
  - Table 78. DAC_SM_1
    48
  - Comparator (COMP)
    49
  - Table 79. VREF_SM_0
    49
  - Table 80. VREF_SM_1
    49
  - Table 81. COMP_SM_0
    49
  - Voltage Reference Buffer (VREFBUF)
    49
  - Table 82. COMP_SM_1
    50
  - Table 83. COMP_SM_2
    50
  - Table 84. COMP_SM_3
    51
  - Table 85. COMP_SM_4
    51
  - Digital Filter for Sigma Delta Modulators (DFSDM)
    52
  - Operational Amplifiers (OPAMP)
    52
  - Table 86. AMP_SM_0
    52
  - Table 87. DFS_SM_0
    52
  - Table 88. DFS_SM_1
    53
  - Table 89. DFS_SM_2
    53
  - Table 90. DFS_SM_3
    53
  - Digital Camera Interface (DCMI)
    54
  - Table 91. DCMI_SM_0
    54
  - Table 92. DCMI_SM_1
    54
  - LCD-TFT Display Controller (LTDC)
    55
  - Table 93. LCD_SM_0
    55
  - Table 94. LCD_SM_1
    55
  - DSI Host (DSI)
    56
  - Table 95. DSI_SM_0
    56
  - Table 96. DSI_SM_1
    56
  - Table 97. TSC_SM_0
    57
  - Table 98. TSC_SM_1
    57
  - Touch Sensing Controller (TSC)
    57
  - HASH Processor (HASH)
    58
  - Table 100. HASH_SM_0
    58
  - Table 101. HASH_SM_1
    58
  - Table 99. TSC_SM_2
    58
  - Table 102. RNG_SM_0
    59
  - Table 103. RNG_SM_1
    59
  - True Random Number Generator (RNG)
    59
  - Advanced Encryption Standard Hardware Accelerator (AES)
    60
  - Table 104. AES_SM_0
    60
  - Table 105. AES_SM_1
    60
  - Advanced, General, and Low-Power Timer (TIM1/2/3/4/5/8/15/16/17 LPTIM1/2)
    61
  - Table 106. AES_SM_2
    61
  - Table 107. ATIM_SM_0
    62
  - Table 108. ATIM_SM_1
    62
  - Table 109. ATIM_SM_2
    63
  - Table 110. ATIM_SM_3
    63
  - Basic Timers (TIM6/7)
    64
  - Table 111. ATIM_SM_4
    64
  - Table 112. GTIM_SM_0
    64
  - Real-Time Clock Module (RTC)
    65
  - Table 113. GTIM_SM_1
    65
  - Table 114. RTC_SM_0
    65
  - Table 115. RTC_SM_1
    66
  - Table 116. RTC_SM_2
    66
  - Inter-Integrated Circuit (I2C)
    67
  - Table 117. RTC_SM_3
    67
  - Table 118. IIC_SM_0
    67
  - Table 119. IIC_SM_1
    67
  - Table 120. IIC_SM_2
    68
  - Table 121. IIC_SM_3
    68
  - Table 122. IIC_SM_4
    69
  - Table 123. UART_SM_0
    69
  - Universal Synchronous/Asynchronous Receiver/Transmitter and Low Power Universal Asychronous Receiver/Transmitter (USART1/2/3/4/5/6/7/8 and LPUART)
    69
  - Table 124. UART_SM_1
    70
  - Table 125. UART_SM_2
    70
  - Table 126. UART_SM_3
    71
  - Serial Peripheral Interface (SPI)
    72
  - Table 127. SPI_SM_0
    72
  - Table 128. SPI_SM_1
    72
  - Table 129. SPI_SM_2
    72
  - Table 130. SPI_SM_3
    73
  - Table 131. SPI_SM_4
    73
  - Serial Audio Interface (SAI)
    74
  - Table 132. SAI_SM_0
    74
  - Table 133. SAI_SM_1
    74
  - Single Wire Protocol Master Interface (SWPMI)
    75
  - Table 134. SAI_SM_2
    75
  - Table 135. SWPMI_SM_0
    75
  - Table 136. SWPMI_SM_1
    76
  - Table 137. SWPMI_SM_2
    76
  - SD/SDIO/MMC Card Host Interface (SDMMC)
    77
  - Table 138. SWPMI_SM_3
    77
  - Table 139. SDIO_SM_0
    77
  - Table 140. SDIO_SM_1
    78
  - Table 141. SDIO_SM_2
    78
  - Controller Area Network (Bxcan)
    79
  - Table 142. CAN_SM_0
    79
  - Table 143. CAN_SM_1
    79
  - Table 144. CAN_SM_2
    80
  - Table 145. USB_SM_0
    80
  - Universal Serial Bus Full-Speed Device Interface (OTG_FS)
    80
  - Table 146. USB_SM_1
    81
  - Table 147. USB_SM_2
    81
  - Part Separation (no Interference)
    82
  - Table 148. USB_SM_3
    82
  - Table 149. FFI_SM_0
    82
- Conditions of Use
  83
- Table 150. FFI_SM_1
  83
- Table 151. List of Safety Recommendations
  84
4 Safety Results

91
- Random Hardware Failure Safety Results
  91
- Analysis of Dependent Failures
  93
  - Power Supply
    93
  - Clock
    93
  - Dma
    94
  - Internal Temperature
    94
5 List of Evidences

95
6 Change Impact Analysis for Other Safety Standards

96
Revision History

100
- Table 156. Document Revision History
  100
Glossary

102

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