Analog Devices ADSP-BF53x Blackfin Reference page 10

Contents
Return Registers and Instructions .......................................... 4-42
Executing RTX, RTN, or RTE in a Lower
Priority Event ................................................................ 4-45
Emulation Interrupt .............................................................. 4-45
Reset Interrupt ...................................................................... 4-46
NMI (Nonmaskable Interrupt) .............................................. 4-46
Exceptions ............................................................................ 4-47
Hardware Error Interrupt ...................................................... 4-47
Core Timer Interrupt ............................................................ 4-47
General-purpose Interrupts (IVG7-IVG15) ............................ 4-47
Interrupt Processing .................................................................... 4-48
Global Enabling/Disabling of Interrupts ................................ 4-48
Servicing Interrupts ............................................................... 4-48
Software Interrupts ............................................................... 4-50
Nesting of Interrupts ............................................................. 4-51
Non-nested Interrupts ...................................................... 4-51
Nested Interrupts ............................................................. 4-51
Example Prolog Code for Nested Interrupt
Service Routine .......................................................... 4-53
Example Epilog Code for Nested Interrupt
Service Routine .......................................................... 4-54
Logging of Nested Interrupt Requests ........................... 4-55
Self-Nesting of Core Interrupts ......................................... 4-55
x ADSP-BF53x/BF56x Blackfin Processor Programming Reference