Analog Devices ADSP-BF53x Blackfin Reference page 14

Contents
Memory Protection and Properties .............................................. 6-45
Memory Management Unit ................................................... 6-45
Memory Pages ....................................................................... 6-48
Memory Page Attributes ................................................... 6-48
Page Descriptor Table ............................................................ 6-50
CPLB Management ............................................................... 6-50
MMU Application ................................................................ 6-52
Examples of Protected Memory Regions ................................ 6-54
ICPLB_DATAx Registers ...................................................... 6-55
DCPLB_DATAx Registers ..................................................... 6-57
DCPLB_ADDRx Registers .................................................... 6-59
ICPLB_ADDRx Registers ..................................................... 6-60
DCPLB_STATUS and ICPLB_STATUS Registers ................. 6-61
DCPLB_FAULT_ADDR and ICPLB_FAULT_ADDR
Registers ............................................................................ 6-63
Memory Transaction Model ........................................................ 6-65
Load/Store Operation ................................................................. 6-66
Interlocked Pipeline .............................................................. 6-66
Ordering of Loads and Stores ................................................ 6-67
Synchronizing Instructions .................................................... 6-68
Speculative Load Execution ................................................... 6-69
Conditional Load Behavior ................................................... 6-70
Working With Memory .............................................................. 6-71
Alignment ............................................................................. 6-71
Cache Coherency .................................................................. 6-71
xiv ADSP-BF53x/BF56x Blackfin Processor Programming Reference