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Atomic Operations ................................................................ 6-72
Memory-mapped Registers .................................................... 6-72
Core MMR Programming Code Example ............................... 6-73
Terminology ............................................................................... 6-74
Jump ............................................................................................ 7-2
Call .............................................................................................. 7-8
RTS, RTI, RTX, RTN, RTE (Return) ......................................... 7-10
LSETUP, LOOP ......................................................................... 7-13
Load Immediate ............................................................................ 8-3
Load Pointer Register .................................................................... 8-7
Load Data Register ...................................................................... 8-10
Load Half-Word - Zero-Extended ............................................... 8-15
Load Half-Word - Sign-Extended ................................................ 8-19
Load High Data Register Half ..................................................... 8-23
Load Low Data Register Half ...................................................... 8-27
Load Byte - Zero-Extended ......................................................... 8-31
Load Byte - Sign-Extended ......................................................... 8-34
Store Pointer Register .................................................................. 8-37
Store Data Register ..................................................................... 8-40
Store High Data Register Half ..................................................... 8-45
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
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