Analog Devices ADSP-BF53x Blackfin Reference page 22

Contents
Cycle Counter .......................................................................... 21-23
CYCLES and CYCLES2 Registers ....................................... 21-24
SYSCFG Register ................................................................ 21-26
Product Identification Register .................................................. 21-27
DSPID Register .................................................................. 21-27
ADSP-BF535 CONSIDERATIONS
ADSP-BF535 Operating Modes and States .................................... A-1
ADSP-BF535 Flags ....................................................................... A-2
CORE MMR ASSIGNMENTS
L1 Data Memory Controller Registers ........................................... B-1
L1 Instruction Memory Controller Registers ................................. B-4
Interrupt Controller Registers ....................................................... B-6
Debug, MP, and Emulation Unit Registers .................................... B-7
Trace Unit Registers ...................................................................... B-8
Watchpoint and Patch Registers .................................................... B-8
Performance Monitor Registers ..................................................... B-9
INSTRUCTION OPCODES
Introduction ................................................................................. C-1
Appendix Organization ........................................................... C-1
Glossary .................................................................................. C-2
Register Names ................................................................... C-2
Functional Units ................................................................. C-3
xxii ADSP-BF53x/BF56x Blackfin Processor Programming Reference