Interrupt Control Registers A To D (Icra To Icrd); Table 5.2 Correspondence Between Interrupt Source And Icr (H8S/2140B Group Compatible Vector Mode: Eivs = 0) - Renesas H8S Series Hardware Manual

5.3.1

Interrupt Control Registers A to D (ICRA to ICRD)

The ICR registers set interrupt control levels for interrupts other than NMI. The correspondence
between interrupt sources and ICRA to ICRD settings is shown in tables 5.2 and 5.3.
Bit Bit Name
7 to 0 ICRn7 to
ICRn0
Note: n: A to D
Table 5.2 Correspondence between Interrupt Source and ICR (H8S/2140B Group
Compatible Vector Mode: EIVS = 0)
Bit Bit Name
7 ICRn7
6 ICRn6
5 ICRn5
4 ICRn4
3 ICRn3
2 ICRn2
1 ICRn1
0 ICRn0
Note: n: A to D
: Reserved. The initial value should not be changed.
Initial Value R/W
All 0 R/W
ICRA ICRB
IRQ0 A/D converter
IRQ1 FRT
IRQ2, IRQ3 —
IRQ4, IRQ5 —
IRQ6, IRQ7 TMR_0
DTC TMR_1
WDT_0 TMR_X, TMR_Y
WDT_1 KBU
Description
Interrupt Control Level
0: Corresponding interrupt source is interrupt
control level 0 (no priority)
1: Corresponding interrupt source is interrupt
control level 1 (priority)
Register
ICRC
—
SCI_1
SCI_2
IIC_0
IIC_1
—
LPC
—
Rev. 3.00 Jul. 14, 2005 Page 83 of 986
Section 5 Interrupt Controller
ICRD
IRQ8 to IRQ11
IRQ12 to IRQ15
—
WUE8 to WUE15
TPU_0
TPU_1
TPU_2
—
REJ09B0098-0300