Renesas H8S Series Hardware Manual page 483

Bit Bit Name
4 O/E
3 BCP1
2 BCP0
1 CKS1
0 CKS0
Note: etu: Element Time Unit (time taken to transfer one bit)
*
Initial Value R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
Section 15 Serial Communication Interface (SCI, IrDA)
Description
Parity Mode (valid only when the PE bit is 1 in
asynchronous mode)
0: Selects even parity
1: Selects odd parity
For details on the usage of this bit in smart card
interface mode, see section 15.7.2, Data Format
(Except in Block Transfer Mode).
Basic Clock Pulse 1,0
These bits select the number of basic clock cycles in
a 1-bit data transfer time in smart card interface
mode.
00: 32 clock cycles (S = 32)
01: 64 clock cycles (S = 64)
10: 372 clock cycles (S = 372)
11: 256 clock cycles (S = 256)
For details, see section 15.7.4, Receive Data
Sampling Timing and Reception Margin. S is
described in section 15.3.9, Bit Rate Register
(BRR).
Clock Select 1, 0
These bits select the clock source for the baud rate
generator.
00: φ clock (n = 0)
01: φ/4 clock (n = 1)
10: φ/16 clock (n = 2)
11: φ/64 clock (n = 3)
For the relation between the bit rate register setting
and the baud rate, see section 15.3.9, Bit Rate
Register (BRR). n is the decimal display of the value
of n in BRR (see section 15.3.9, Bit Rate Register
(BRR)).
Rev. 3.00 Jul. 14, 2005 Page 435 of 986
REJ09B0098-0300