8.12.4
Noise Canceller Enable Register (PCNCE)
PCNCE enables or disables the noise cancel circuit at port C.
Bit
Bit Name
7
PC7NCE
6
PC6NCE
5
PC5NCE
4
PC4NCE
3
PC3NCE
2
PC2NCE
1
PC1NCE
0
PC0NCE
8.12.5
Noise Canceller Mode Control Register (PCNCMC)
PCNCMC controls whether 1 or 0 is expected for the input signal to port C in bit units.
Bit
Bit Name
7
PC7NCMC
6
PC6NCMC
5
PC5NCMC
4
PC4NCMC
3
PC3NCMC
2
PC2NCMC
1
PC1NCMC
0
PC0NCMC
Initial Value
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
Initial Value
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
Description
Noise cancel circuit is enabled when PCNCE bit is
set to 1, and the pin state is fetched in the PCPIN
in the sampling cycle set by the PCNCCS.
Description
1 expected: 1 is stored in the port data register
when 1 is input stably
0 expected: 0 is stored in the port data register
when 0 is input stably
Rev. 3.00 Jul. 14, 2005 Page 211 of 986
Section 8 I/O Ports
REJ09B0098-0300