Renesas H8S Series Hardware Manual page 22

16-bit single-chip microcomputer
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15.3.5 Serial Mode Register (SMR) ................................................................................ 432
15.3.6 Serial Control Register (SCR) .............................................................................. 436
15.3.7 Serial Status Register (SSR) ................................................................................. 439
15.3.8 Smart Card Mode Register (SCMR)..................................................................... 444
15.3.9 Bit Rate Register (BRR) ....................................................................................... 445
15.3.10 Keyboard Comparator Control Register (KBCOMP)........................................... 453
15.4 Operation in Asynchronous Mode ..................................................................................... 455
15.4.1 Data Transfer Format............................................................................................ 455
Mode..................................................................................................................... 457
15.4.3 Clock..................................................................................................................... 458
15.4.4 SCI Initialization (Asynchronous Mode).............................................................. 459
15.4.5 Serial Data Transmission (Asynchronous Mode) ................................................. 460
15.4.6 Serial Data Reception (Asynchronous Mode) ...................................................... 462
15.5 Multiprocessor Communication Function.......................................................................... 466
15.5.1 Multiprocessor Serial Data Transmission ............................................................. 468
15.5.2 Multiprocessor Serial Data Reception .................................................................. 469
15.6 Operation in Clocked Synchronous Mode ......................................................................... 472
15.6.1 Clock..................................................................................................................... 472
15.6.2 SCI Initialization (Clocked Synchronous Mode).................................................. 473
15.6.3 Serial Data Transmission (Clocked Synchronous Mode) ..................................... 474
15.6.4 Serial Data Reception (Clocked Synchronous Mode) .......................................... 477
(Clocked Synchronous Mode) .............................................................................. 479
15.7 Smart Card Interface Description ...................................................................................... 481
15.7.1 Sample Connection............................................................................................... 481
15.7.2 Data Format (Except in Block Transfer Mode) .................................................... 481
15.7.3 Block Transfer Mode ............................................................................................ 483
15.7.4 Receive Data Sampling Timing and Reception Margin ....................................... 483
15.7.5 Initialization.......................................................................................................... 484
15.7.7 Serial Data Reception (Except in Block Transfer Mode) ..................................... 488
15.7.8 Clock Output Control............................................................................................ 490
15.8 IrDA Operation .................................................................................................................. 492
15.9 Interrupt Sources................................................................................................................ 496
15.9.2 Interrupts in Smart Card Interface Mode .............................................................. 497
15.10 Usage Notes ....................................................................................................................... 498
15.10.1 Module Stop Mode Setting ................................................................................... 498
15.10.2 Break Detection and Processing ........................................................................... 498
Rev. 3.00 Jul. 14, 2005 Page xxii of xlviii

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