Renesas H8S Series Hardware Manual page 14
16-bit single-chip microcomputer
Hide thumbs
Also See for H8S Series:
- Hardware manual (1047 pages) ,
- User manual (38 pages) ,
- User manual (21 pages)
Table of Contents
Advertisement
Section 7 Data Transfer Controller (DTC)........................................................ 135
7.1
Features.............................................................................................................................. 136
7.2
Register Descriptions......................................................................................................... 137
7.2.1
DTC Mode Register A (MRA) ............................................................................. 138
7.2.2
DTC Mode Register B (MRB).............................................................................. 139
7.2.3
DTC Source Address Register (SAR)................................................................... 139
7.2.4
DTC Destination Address Register (DAR)........................................................... 140
7.2.5
DTC Transfer Count Register A (CRA) ............................................................... 140
7.2.6
DTC Transfer Count Register B (CRB)................................................................ 140
7.2.7
DTC Enable Registers (DTCER).......................................................................... 141
7.2.8
DTC Vector Register (DTVECR)......................................................................... 142
7.3
Activation Sources............................................................................................................. 143
7.4
Location of Register Information and DTC Vector Table ................................................. 144
7.5
Operation ........................................................................................................................... 147
7.5.1
Normal Mode........................................................................................................ 148
7.5.2
Repeat Mode......................................................................................................... 149
7.5.3
Block Transfer Mode ............................................................................................ 150
7.5.4
Chain Transfer ...................................................................................................... 151
7.5.5
Interrupt Sources................................................................................................... 152
7.5.6
Operation Timing.................................................................................................. 152
7.5.7
Number of DTC Execution States ........................................................................ 154
7.6
Procedures for Using DTC................................................................................................. 155
7.6.1
Activation by Interrupt.......................................................................................... 155
7.6.2
Activation by Software ......................................................................................... 155
7.7
Examples of Use of the DTC ............................................................................................. 156
7.7.1
Normal Mode........................................................................................................ 156
7.7.2
Software Activation .............................................................................................. 157
7.8
Usage Notes ....................................................................................................................... 158
7.8.1
Module Stop Mode Setting ................................................................................... 158
7.8.2
On-Chip RAM ...................................................................................................... 158
7.8.3
DTCE Bit Setting.................................................................................................. 158
7.8.4
Setting Required on Entering Subactive Mode or Watch Mode........................... 158
7.8.5
Section 8 I/O Ports............................................................................................. 159
8.1
Port 1.................................................................................................................................. 164
8.1.1
Port 1 Data Direction Register (P1DDR).............................................................. 164
8.1.2
Port 1 Data Register (P1DR) ................................................................................ 165
8.1.3
Port 1 Pull-Up MOS Control Register (P1PCR)................................................... 165
8.1.4
Pin Functions ........................................................................................................ 166
Rev. 3.00 Jul. 14, 2005 Page xiv of xlviii
Advertisement
Table of Contents
