Table 15.12 Ircks2 To Ircks0 Bit Settings - Renesas H8S Series Hardware Manual

(3) High-Level Pulse Width Selection
Table 15.12 shows possible settings for bits IrCKS2 to IrCKS0 (minimum pulse width), and this
LSI's operating frequencies and bit rates, for making the pulse width shorter than 3/16 times the bit
rate in transmission.

Table 15.12 IrCKS2 to IrCKS0 Bit Settings

Operating
Frequency 2400
φ (MHz)
78.13
4.9152 011
5 011
6 100
6.144 100
7.3728 100
8 100
9.8304 100
10 100
12 101
12.288 101
14 101
14.7456 101
16 101
16.9344 101
17.2032 101
18 101
19.6608 101
20 101
Bit Rate (bps) (Upper Row) / Bit Interval × 3/16 (µs) (Lower Row)
9600 19200
19.53 9.77
011 011
011 011
100 100
100 100
100 100
100 100
100 100
100 100
101 101
101 101
101 101
101 101
101 101
101 101
101 101
101 101
101 101
101 101
Section 15 Serial Communication Interface (SCI, IrDA)
38400
4.88
011
011
100
100
100
100
100
100
101
101
101
101
101
101
101
101
101
101
Rev. 3.00 Jul. 14, 2005 Page 495 of 986
57600 115200
3.26 1.63
011 011
011 011
100 100
100 100
100 100
100 100
100 100
100 100
101 101
101 101
101 101
101 101
101 101
101 101
101 101
101 101
101 101
101 101
REJ09B0098-0300