Renesas H8S Series Hardware Manual page 17

16-bit single-chip microcomputer
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8.15.1 Port F Data Direction Register (PFDDR) ............................................................. 227
8.15.2 Port F Output Data Register (PFODR) ................................................................. 228
8.15.3 Port F Input Data Register (PFPIN)...................................................................... 228
8.15.4 Pin Functions ........................................................................................................ 229
8.15.5 Port F Nch-OD control register (PFNOCR).......................................................... 231
8.15.6 Pin Functions ........................................................................................................ 231
8.15.7 Port F Input Pull-Up MOS.................................................................................... 232
8.16 Port G................................................................................................................................. 233
8.16.1 Port G Data Direction Register (PGDDR) ............................................................ 233
8.16.2 Port G Output Data Register (PGODR) ................................................................ 234
8.16.3 Port G Input Data Register (PGPIN)..................................................................... 234
8.16.4 Noise Canceller Enable Register (PGNCE).......................................................... 235
8.16.5 Noise Canceller Mode Control Register (PGNCMC)........................................... 235
8.16.6 Noise Cancel Cycle Setting Register (PGNCCS) ................................................. 236
8.16.7 Pin Functions ........................................................................................................ 237
8.16.8 Port G Nch-OD control register (PGNOCR) ........................................................ 242
8.16.9 Pin Functions ........................................................................................................ 242
8.17 Change of Peripheral Function Pins................................................................................... 243
8.17.1 Port Control Register 0 (PTCNT0) ....................................................................... 243
8.17.2 Port Control Register 1 (PTCNT1) ....................................................................... 244
8.17.3 Port Control Register 2 (PTCNT2) ....................................................................... 245
Section 9 8-Bit PWM Timer (PWM).................................................................247
9.1
Features.............................................................................................................................. 247
9.2
Input/Output Pins ............................................................................................................... 249
9.3
Register Descriptions ......................................................................................................... 249
9.3.1
PWM Register Select (PWSL).............................................................................. 250
9.3.2
PWM Data Registers 15 to 8 (PWDR15 to PWDR8)........................................... 251
9.3.3
PWM Data Polarity Register B (PWDPRB)......................................................... 252
9.3.4
PWM Output Enable Register B (PWOERB)....................................................... 252
9.3.5
Peripheral Clock Select Register (PCSR) ............................................................. 253
9.4
Operation ........................................................................................................................... 254
9.4.1
PWM Setting Example ......................................................................................... 256
9.4.2
Diagram of PWM Used as D/A Converter ........................................................... 256
9.5
Usage Notes ....................................................................................................................... 257
9.5.1
Module Stop Mode Setting ................................................................................... 257
Rev. 3.00 Jul. 14, 2005 Page xvii of xlviii

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