Section 17 Keyboard Buffer Control Unit (Kbu); Features - Renesas H8S Series Hardware Manual

16-bit single-chip microcomputer

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Section 17 Keyboard Buffer Control Unit (KBU)

This LSI has three on-chip keyboard buffer control unit (KBU) channels. The KBU is provided

with functions conforming to the PS/2 interface specifications.

Data transfer using the KBU employs a data line (KD) and a clock line (KCLK), providing

economical use of connectors, board surface area, etc. Figure 17.1 shows a block diagram of the

• Conforms to PS/2 interface specifications

• Direct bus drive (via the KCLK and KD pins)

• Interrupt sources: on completion of data reception/transmission, on detection of clock falling

edge, and on detection of the first falling edge of a clock

• Error detection: parity error, stop bit monitoring, and receive notify monitoring

Rev. 3.00 Jul. 14, 2005 Page 581 of 986

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