Interrupt Sources; External Interrupt Sources - Renesas H8S Series Hardware Manual

5.4

Interrupt Sources

5.4.1

External Interrupt Sources

The interrupt sources of external interrupts are NMI, IRQ15 to IRQ0, KIN15 to KIN0 and WUE15
to WUE0. These interrupts can be used to restore this LSI from software standby mode.
(1) NMI Interrupt
The nonmaskable external interrupt NMI is the highest-priority interrupt, and is always accepted
regardless of the interrupt control mode or the status of the CPU interrupt mask bits. The NMIEG
bit in SYSCR can be used to select whether an interrupt is requested at a rising edge or falling
edge on the NMI pin.
(2) IRQ15 to IRQ0 Interrupts
Interrupts IRQ15 to IRQ0 are requested by an input signal at pins IRQ15 to IRQ0 or pins
ExIRQ15 to ExIRQ0. Interrupts IRQ15 to IRQ0 have the following features:
• The interrupt exception handling for interrupt requests IRQ15 to IRQ0 can be started at an
independent vector address.
• Using ISCR, it is possible to select whether an interrupt is generated by a low level, falling
edge, rising edge, or both edges, at pins IRQ15 to IRQ0 or pins ExIRQ15 to ExIRQ0.
• Enabling or disabling of interrupt requests IRQ15 to IRQ0 can be selected with IER.
• The status of interrupt requests IRQ15 to IRQ0 is indicated in ISR. ISR flags can be cleared to
0 by software.
When the interrupts are requested while IRQ15 to IRQ0 interrupt requests are generated at low
level of IRQn input, hold the corresponding IRQ input at low level until the interrupt handling
starts. Then put the relevant IRQ input back to high level within the interrupt handling routine and
clear the IRQnF bit (n = 15 to 0) in ISR to 0. If the relevant IRQ input is put back to high level
before the interrupt handling starts, the relevant interrupt may not be executed.
The detection of IRQ15 to IRQ0 interrupts does not depend on whether the relevant pin has been
set for input or output. Therefore, when a pin is used as an external interrupt input pin, clear the
DDR bit of the corresponding port to 0 so it is not used as an I/O pin for another function.
A block diagram of interrupts IRQ15 to IRQ0 is shown in figure 5.4.
Section 5 Interrupt Controller
Rev. 3.00 Jul. 14, 2005 Page 99 of 986
REJ09B0098-0300