Table 12.24 Tpu Interrupts - Renesas H8S Series Hardware Manual

16-bit single-chip microcomputer
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Section 12 16-Bit Timer Pulse Unit (TPU)

Table 12.24 TPU Interrupts

Channel Name
0
TGI0A
TGI0B
TGI0C
TGI0D
TCI0V
1
TGI1A
TGI1B
TCI1V
TCI1U
2
TGI2A
TGI2B
TCI2V
TCI2U
Note: This table shows the initial state immediately after a reset. The relative channel priorities
can be changed by the interrupt controller.
Rev. 3.00 Jul. 14, 2005 Page 358 of 986
REJ09B0098-0300
Interrupt Source
TGRA_0 input
capture/compare match
TGRB_0 input
capture/compare match
TGRC_0 input
capture/compare match
TGRD_0 input
capture/compare match
TCNT_0 overflow
TGRA_1 input
capture/compare match
TGRB_1 input
capture/compare match
TCNT_1 overflow
TCNT_1 underflow
TGRA_2 input
capture/compare match
TGRB_2 input
capture/compare match
TCNT_2 overflow
TCNT_2 underflow
Interrupt Flag
DTC Activation
TGFA
Enable
TGFB
Enable
TGFC
Enable
TGFD
Enable
TCFV
Disable
TGFA
Enable
TGFB
Enable
TCFV
Disable
TCFU
Disable
TGFA
Enable
TGFB
Enable
TCFV
Disable
TCFU
Disable
Priority
High
Low

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