TE bit
SCK
output pin
TxD
Port
input/output
output pin
Port
Figure 15.37 Pin States during Transmission in Asynchronous Mode (Internal Clock)
TE bit
SCK
output pin
TxD
Port
input/output
output pin
Port
Note: Initialized in software standby mode
Figure 15.38 Pin States during Transmission in Clocked Synchronous Mode
Transmission start
High output
Start
SCI TxD output
Transmission start
Marking output
SCI TxD output
(Internal Clock)
Section 15 Serial Communication Interface (SCI, IrDA)
Transition to
software standby
Transmission end
mode
Stop
Transition to
Transmission end
software standby
mode
Last TxD bit retained
Rev. 3.00 Jul. 14, 2005 Page 501 of 986
Software standby
mode cancelled
Port
input/output
Port input/output
High output
SCI
Port
TxD output
Software standby
mode cancelled
Port
input/output
Port input/output
High output*
SCI
Port
TxD output
REJ09B0098-0300