Register Descriptions; Bus Control Register (Bcr) - Renesas H8S Series Hardware Manual

Section 6 Bus Controller (BSC)
6.2

Register Descriptions

The bus controller has the following registers.

• Bus control register (BCR)

• Wait state control register (WSCR)
6.2.1 Bus Control Register (BCR)
Bit Bit Name
7 —
6 ICIS0
5 BRSTRM
4 BRSTS1
3 BRSTS0

2
1 IOS1
0 IOS0
Rev. 3.00 Jul. 14, 2005 Page 130 of 986
REJ09B0098-0300
Initial Value R/W
1 R/W
1 R/W
0 R/W
1 R/W
0 R/W
0 R/W
1 R/W
1 R/W
Description
Reserved
The initial value should not be changed.
Idle Cycle Insertion
The initial value should not be changed.
Burst ROM Enable
The initial value should not be changed.
Burst Cycle Select 1
The initial value should not be changed.
Burst Cycle Select 0
The initial value should not be changed.
Reserved
The initial value should not be changed.
IOS Select 1, 0
The initial value should not be changed.