A/D Control Register (Adcr) - Renesas H8S Series Hardware Manual

Section 19 A/D Converter
Bit Bit Name Initial Value
2 CH2 0
1 CH1 0
0 CH0 0
Note: Only 0 can be written for clearing the flag.
*
19.3.3

A/D Control Register (ADCR)

ADCR enables A/D conversion started by an external trigger signal.
Bit Bit Name Initial Value
7 TRGS1 0
6 TRGS0 0
5 to 0 
All 1
Rev. 3.00 Jul. 14, 2005 Page 722 of 986
REJ09B0098-0300
R/W Description
R/W Channel Select 2 to 0
R/W Select analog input channels.
R/W When SCAN = 0
000: AN0
001: AN1
010: AN2
011: AN3
100: AN4
101: AN5
110: AN6
111: AN7
Switch input channels when ADST = 0.
R/W Description
R/W Timer Trigger Select 1 and 0
R/W Enable the start of A/D conversion by a trigger signal.
Set these bits only while A/D conversion is stopped
(ADST = 0).
00: A/D conversion start by external trigger is disabled
01: A/D conversion start by conversion trigger from
TPU
10: A/D conversion start by conversion trigger from
TMR
11: A/D conversion start by ADTRG pin
R/W Reserved
The initial value should not be changed.
When SCAN = 1
000: AN0
001: AN0 and AN1
010: AN0 to AN2
011: AN0 to AN3
100: AN4
101: AN4 and AN5
110: AN4 to AN6
111: AN4 to AN7