Figure 21.22 Sequence Of New Bit Rate Selection - Renesas H8S Series Hardware Manual

Error (%) = {[
When the new bit rate is selectable, the rate will be set in the register after sending ACK in
response. The host will send an ACK with the new bit rate for confirmation and the boot
program will response with that rate.
Confirmation H'06
• Confirmation, H'06 (1 byte): Confirmation of a new bit rate
Response H'06
• Response, H'06 (1 byte): Response to confirmation of a new bit rate
The sequence of new bit rate selection is shown in figure 21.22.
Host
Waiting for one-bit period
at the specified bit rate
Setting a new bit rate
(6) Transition to Programming/Erasing State
The boot program will transfer the erasing program, and erase the user MATs and user boot MATs
in that order in response to the transition to the programming/erasing state command. On
completion of this erasure, ACK will be returned and a transition made to the
programming/erasing state.
Before sending the programming selection command or program data, the host should select the
LSI device with the device selection command, the clock mode with the clock mode selection
command, and the new bit rate with the new bit rate selection command, and then send the
transition to programming/erasing state command.
φ × 10
6
(N + 1) × B × 64 × 2 (2×n − 1)
Setting a new bit rate
H'06 (ACK) with the new bit rate
H'06 (ACK) with the new bit rate

Figure 21.22 Sequence of New Bit Rate Selection

Section 21 Flash Memory (0.18-µm F-ZTAT Version)
] − 1} × 100
H'06 (ACK)
Rev. 3.00 Jul. 14, 2005 Page 811 of 986
Boot program
Setting a new bit rate
REJ09B0098-0300