Noise Canceller Enable Register (P6Nce); Noise Canceller Mode Control Register (P6Ncmc) - Renesas H8S Series Hardware Manual

Section 8 I/O Ports
8.6.4

Noise Canceller Enable Register (P6NCE)

P6NCE enables or disables the noise cancel circuit at port 6.
Bit Bit Name
7 P67NCE
6 P66NCE
5 P65NCE
4 P64NCE
3 P63NCE
2 P62NCE
1 P61NCE
0 P60NCE
8.6.5

Noise Canceller Mode Control Register (P6NCMC)

P6NCMC controls whether 1 or 0 is expected for the input signal to port 6 in bit units.
Bit Bit Name
7 P67NCMC
6 P66NCMC
5 P65NCMC
4 P64NCMC
3 P63NCMC
2 P62NCMC
1 P61NCMC
0 P60NCMC
Rev. 3.00 Jul. 14, 2005 Page 182 of 986
REJ09B0098-0300
Initial Value R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
Initial Value R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
Description
Noise cancel circuit is enabled when P6NCE bit is
set to 1, and the pin state is fetched in the P6DR in
the sampling cycle set by the P6NCCS.
Description
1 expected: 1 is stored in the port data register
when 1 is input stably
0 expected: 0 is stored in the port data register
when 0 is input stably