Renesas H8S Series Hardware Manual page 224

Section 8 I/O Ports
• P45/TMRI1
The pin function is switched as shown below according to the P45DDR bit.
When the CCLR1 and CCLR0 bits in TCR of TMR_1 are set to 1, this pin is used as the
TMRI1 input pin.
P45DDR
Pin function
• P44/TMO1
The pin function is switched as shown below according to the combination of the OS3 to OS0
bits in TCR of TMR_1 and the P44DDR bit.
OS3 to OS0
P44DDR
Pin function
• P43/TMCI1
The pin function is switched as shown below according to the P43DDR bit. When the external
clock is selected by the CKS2 to CKS0 bits in TCR of TMR_1, this pin can be used as the
TMCII input pin.
P43DDR
Pin function
• P42/ExIRQ7/TMRI0/SCK2/SDA1
The pin function is switched as shown below according to the combination of the SDA1AS
and SDA1BS bits in PTCNT1, ICE bit in ICCR of IIC_1, CKE1 and CKE0 bits in SCR of
SCI_2, C/A bit in SMR, and the P42DDR bit. When the CCLR1 and CCLR0 bits in TCR of
TMR_0 are set to 1, this pin is used as the TMRI0 input pin. When the ISS7 bit in ISSR and
the IRQ7E bit in IER of the interrupt controller are set to 1, this pin can be used as the
ExIRQ7 interrupt input pin. IICENABLE in the following table is expressed by the following
logical expressions.
IICENABLE = 1 : ICE
Rev. 3.00 Jul. 14, 2005 Page 176 of 986
REJ09B0098-0300
0
P45 input pin
All 0
0
P44 input pin
0
P43 input pin
SDA1AS SDA1BS
• •
TMRI1 input pin
1
P44 output pin
TMCI1 input pin
1
P45 output pin
One bit is set as 1

TMO1 output pin
1
P43 output pin