Figure 10.7 Output Waveform When Dadr = H'0207 (Os = 1) - Renesas H8S Series Hardware Manual

Section 10 14-Bit PWM Timer (PWMX)
Since the value of the subsequent six bits is B'0000 01, an additional pulse is output only at the
location of base pulse No. 63 according to table 10.5. Thus, an additional pulse of 1/256 × (T) is to
be added to the base pulse.
Base cycle
No. 0
Base pulse
High width: 2/256 × (T)

Figure 10.7 Output Waveform when DADR = H'0207 (OS = 1)

However, when CFS = 0 (base cycle = resolution (T) × 64), the duty cycle of the base pulse is
determined by the upper six bits and the locations of the additional pulses by the subsequent eight
bits with a method similar to as above.
Rev. 3.00 Jul. 14, 2005 Page 274 of 986
REJ09B0098-0300
1 conversion cycle
Base cycle
No. 1
Base pulse
2/256 × (T)
Base cycle
No. 63
Additional pulse output location
Additional pulse
1/256 × (T)