Transmit Data Register (Tdr); Transmit Shift Register (Tsr); Serial Mode Register (Smr) - Renesas H8S Series Hardware Manual

Section 15 Serial Communication Interface (SCI, IrDA)
15.3.3

Transmit Data Register (TDR)

TDR is an 8-bit register that stores transmit data. When the SCI detects that TSR is empty, it
transfers the transmit data written in TDR to TSR and starts transmission. The double-buffered
structures of TDR and TSR enable continuous serial transmission. If the next transmit data has
already been written to TDR when one frame of data is transmitted, the SCI transfers the written
data to TSR to continue transmission. Although TDR can be read from or written to by the CPU at
all times, to achieve reliable serial transmission, write transmit data to TDR for only once after
confirming that the TDRE bit in SSR is set to 1. The initial value of TDR is H'FF.
15.3.4

Transmit Shift Register (TSR)

TSR is a shift register that transmits serial data. To perform serial data transmission, the SCI first
transfers transmit data from TDR to TSR, and then sends the data to the TxD pin. TSR cannot be
directly accessed by the CPU.
15.3.5

Serial Mode Register (SMR)

SMR is used to set the SCI's serial transfer format and select the baud rate generator clock source.
Some bits in SMR have different functions in normal mode and smart card interface mode.
Rev. 3.00 Jul. 14, 2005 Page 432 of 986
REJ09B0098-0300