Dtc Destination Address Register (Dar); Dtc Transfer Count Register A (Cra); Dtc Transfer Count Register B (Crb) - Renesas H8S Series Hardware Manual

Section 7 Data Transfer Controller (DTC)
7.2.4

DTC Destination Address Register (DAR)

DAR is a 24-bit register that designates the destination address of data to be transferred by the
DTC. For word-size transfer, specify an even destination address.
7.2.5

DTC Transfer Count Register A (CRA)

CRA is a 16-bit register that designates the number of times data is to be transferred by the DTC.
In normal mode, the entire CRA functions as a 16-bit transfer counter (1 to 65536). It is
decremented by 1 every time data is transferred, and transfer ends when the count reaches H'0000.
In repeat mode or block transfer mode, the CRA is divided into two parts; the upper eight bits
(CRAH) and the lower 8 bits (CRAL). CRAH holds the number of transfers while CRAL
functions as an 8-bit transfer counter (1 to 256). CRAL is decremented by 1 every time data is
transferred, and the contents of CRAH are sent when the count reaches H'00.
7.2.6

DTC Transfer Count Register B (CRB)

CRB is a 16-bit register that designates the number of times data is to be transferred by the DTC in
block transfer mode. It functions as a 16-bit transfer counter (1 to 65536) that is decremented by 1
every time data is transferred, and transfer ends when the count reaches H'0000.
Rev. 3.00 Jul. 14, 2005 Page 140 of 986
REJ09B0098-0300