Time Constant Register C (Tcorc); Input Capture Registers R And F (Ticrr And Ticrf) - Renesas H8S Series Hardware Manual

Section 13 8-Bit Timer (TMR)
Bit Bit Name Initial Value R/W
1 OS1 0
0 OS0 0
Note: Only 0 can be written, for flag clearing.
*
13.3.6

Time Constant Register C (TCORC)

TCORC is an 8-bit readable/writable register. The sum of contents of TCORC and TICR is always
compared with TCNT. When a match is detected, a compare-match C signal is generated.
However, comparison at the T
TICR is disabled. TCORC is initialized to H'FF.
13.3.7

Input Capture Registers R and F (TICRR and TICRF)

TICRR and TICRF are 8-bit read-only registers. While the ICST bit in TCONRI is set to 1, the
contents of TCNT are transferred at the rising edge and falling edge of the external reset input
(TMRIX) in that order. The ICST bit is cleared to 0 when one capture operation ends. TICRR and
TICRF are initialized to H'00.
Rev. 3.00 Jul. 14, 2005 Page 394 of 986
REJ09B0098-0300
Description
R/W Output Select 1, 0
R/W These bits specify how the TMOY pin output level is to
be changed by compare-match A of TCORA_Y and
TCNT_Y.
00: No change
01: 0 is output
10: 1 is output
11: Output is inverted (toggle output)
state in the write cycle to TCORC and at the input capture cycle of
2