Figure 21.10 Ram Map When Programming/Erasing Is Executed - Renesas H8S Series Hardware Manual

(1) On-Chip RAM Address Map when Programming/Erasing is Executed
Part of the procedure program that is made by the user, like the download request,
programming/erasing procedure, and determination of the result, must be executed in the on-chip
RAM. The on-chip program that is to be downloaded is all in the on-chip RAM. Note that areas in
the on-chip RAM must be controlled so that these parts do not overlap.
Figure 21.10 shows the area where a program is downloaded.
Area where program
is downloaded
(Size: 2 kbytes)
This area cannot be
used during the
programming/
erasing processing.
Note: * Differs according to the area specified by FTDAR since the on-chip RAM area

Figure 21.10 RAM Map when Programming/Erasing is Executed

<On-chip RAM>
Area that can be used by user*
(Return value: 1 byte)
Programming/erasing program entry
Initialization program entry
Initialization + programming program
Initialization + erasing program
Area that can be used by user*
in this LSI is split into H'FFD080 to H'FFEFFF and H'FFFF00 to H'FFFF7F.
Section 21 Flash Memory (0.18-µm F-ZTAT Version)
DPFR
System area
(15 bytes)
or
Rev. 3.00 Jul. 14, 2005 Page 769 of 986
Address
RAMTOP
FTDAR setting
FTDAR setting + 16
FTDAR setting + 32
FTDAR setting + 2 kbytes
RAMEND
REJ09B0098-0300