(1)
Input Capture/Compare Match Interrupt
An interrupt is requested if the TGIE bit in TIER is set to 1 when the TGF flag in TSR is set to 1
by the occurrence of a TGR input capture/compare match on a particular channel. The interrupt
request is cleared by clearing the TGF flag to 0. The TPU has 16 input capture/compare match
interrupts, four each for channel 0, and two each for channels 1 and 2.
(2)
Overflow Interrupt
An interrupt is requested if the TCIEV bit in TIER is set to 1 when the TCFV flag in TSR is set to
1 by the occurrence of TCNT overflow on a channel. The interrupt request is cleared by clearing
the TCFV flag to 0. The TPU has three overflow interrupts, one for each channel.
(3)
Underflow Interrupt
An interrupt is requested if the TCIEU bit in TIER is set to 1 when the TCFU flag in TSR is set to
1 by the occurrence of TCNT underflow on a channel. The interrupt request is cleared by clearing
the TCFU flag to 0. The TPU has two underflow interrupts, one each for channels 1 and 2.
12.6.2
DTC Activation
The DTC can be activated by the TGR input capture/compare match interrupt for a channel. For
details, see section 7, Data Transfer Controller (DTC). A total of eight TPU input capture/compare
match interrupts can be used as DTC activation sources, four each for channel 0, and two each for
channels 1 and 2.
12.6.3
A/D Converter Activation
The A/D converter can be activated by the TGRA input capture/compare match for a channel. If
the TTGE bit in TIER is set to 1 when the TGFA flag in TSR is set to 1 by the occurrence of a
TGRA input capture/compare match on a particular channel, a request to start A/D conversion is
sent to the A/D converter. If the TPU conversion start trigger has been selected on the A/D
converter side at this time, A/D conversion is started. In the TPU, a total of three TGRA input
capture/compare match interrupts can be used as A/D converter conversion start sources, one for
each channel.
Section 12 16-Bit Timer Pulse Unit (TPU)
Rev. 3.00 Jul. 14, 2005 Page 359 of 986
REJ09B0098-0300