Renesas H8S Series Hardware Manual page 319

PCSR
Reso-
PWCKX0
lution
PWCKX1
T
C B A CKS
(µs)
0 1 1 1 12.8
(φ/256)
1 0 0 1 51.2
(φ/1024)
1 0 1 1 204.8
(φ/4096)
1 1 0 1 496.48
(φ/16384)
1 1 1 1 Setting
prohibited
Note: Indicates the conversion cycle when specific DA3 to DA0 bits are fixed.
*
Conver-
Base sion TL/TH
CFS Cycle Cycle (OS = 0/OS = 1)
0 819.2 209.7 Always low/high output
DA13 to 0 = H'0000 to H'00FF
(µs) (ms)
(Data value) × T
/1.2kHz
DA13 to 0 = H'0100 to H'3FFF
1 3276.8 Always low/high output
DA13 to 0 = H'0000 to H'003F
(µs)
(Data value) × T
/305.2kH
DA13 to 0 = H'0040 to H'3FFF
z
0 3.3 838.9 Always low/high output
DA13 to 0 = H'0000 to H'00FF
(ms) (ms)
(Data value) × T
/305.2Hz
DA13 to 0 = H'0100 to H'3FFF
1 13.1 Always low/high output
DA13 to 0 = H'0000 to H'003F
(ms)
(Data value) × T
/76.3Hz
DA13 to 0 = H'0040 to H'3FFF
0 13.1 2.03 Always low/high output
DA13 to 0 = H'0000 to H'00FF
(ms) (s)
(Data value) × T
/76.3Hz
DA13 to 0 = H'0100 to H'3FFF
1 52.4 Always low/high output
DA13 to 0 = H'0000 to H'003F
(ms)
(Data value) × T
/19.1Hz
DA13 to 0 = H'0040 to H'3FFF
0 52.4 8.13 Always low/high output
DA13 to 0 = H'0000 to H'00FF
(ms) (s)
(Data value) × T
/19.1Hz
DA13 to 0 = H'0100 to H'3FFF
1 209.7 Always low/high output
DA13 to 0 = H'0000 to H'003F
(ms)
(Data value) × T
/4.8Hz
DA13 to 0 = H'0040 to H'3FFF
   
Section 10 14-Bit PWM Timer (PWMX)
Fixed DADR Bits
Bit Data
Accuracy
(Bits)
14
12
10 0 0
14
12
10 0 0
14
12
10 0 0
14
12
10 0 0
14
12
10 0 0
14
12
10 0 0
14
12
10 0 0
14
12
10 0 0
  
Rev. 3.00 Jul. 14, 2005 Page 271 of 986
REJ09B0098-0300
Conversion
Cycle*
209.7 ms
0 0 52.4 ms
0 0 13.1 ms
209.7 ms
0 0 52.4 ms
0 0 13.1 ms
838.9 ms
0 0 209.7 ms
0 0 52.4 ms
838.9 ms
0 0 209.7 ms
0 0 52.4 ms
3.4 s
0 0 838.9 ms
0 0 209.7 ms
3.4 s
0 0 838.9 ms
0 0 209.7 ms
13.4 s
0 0 3.4 s
0 0 838.9 ms
13.4 s
0 0 3.4 s
0 0 838.9 ms
  