Figure 15.34 Irda Transmission And Reception - Renesas H8S Series Hardware Manual

(1) Transmission
During transmission, the output signals from the SCI (UART frames) are converted to IR frames
using the IrDA interface (see figure 15.34).
For serial data of level 0, a high-level pulse having a width of 3/16 of the bit rate (1-bit interval) is
output (initial setting). The high-level pulse can be selected using the IrCKS2 to IrCKS0 bits in
KBCOMP. The output waveform can also be inverted using the IrTxINV bit in KBCOMP.
The high-level pulse width is defined to be 1.41 µs at the minimum and (3/16 + 2.5%) × bit rate or
(3/16 × bit rate) +1.08 µs at the maximum. For example, when the frequency of system clock φ is
20 MHz, a high-level pulse width of at least 1.41 µs to 1.6 µs can be specified.
For serial data of level 1, no pulses are output.
UART frame
Start
bit
0 1 0 1
Transmission
IR frame
Start
bit
0 1 0 1
Bit
cycle

Figure 15.34 IrDA Transmission and Reception

Section 15 Serial Communication Interface (SCI, IrDA)
Data
0 0 1 1
Reception
Data
0 0 1 1
Pulse width is 1.6 µs to
3/16 bit cycle
Rev. 3.00 Jul. 14, 2005 Page 493 of 986
Stop
bit
0 1
Stop
bit
0 1
REJ09B0098-0300